1*e14ba3cdSAndrew BrestickerImagination Pistachio SoC 2*e14ba3cdSAndrew Bresticker========================= 3*e14ba3cdSAndrew Bresticker 4*e14ba3cdSAndrew BrestickerRequired properties: 5*e14ba3cdSAndrew Bresticker-------------------- 6*e14ba3cdSAndrew Bresticker - compatible: Must include "img,pistachio". 7*e14ba3cdSAndrew Bresticker 8*e14ba3cdSAndrew BrestickerCPU nodes: 9*e14ba3cdSAndrew Bresticker---------- 10*e14ba3cdSAndrew BrestickerA "cpus" node is required. Required properties: 11*e14ba3cdSAndrew Bresticker - #address-cells: Must be 1. 12*e14ba3cdSAndrew Bresticker - #size-cells: Must be 0. 13*e14ba3cdSAndrew BrestickerA CPU sub-node is also required for at least CPU 0. Since the topology may 14*e14ba3cdSAndrew Brestickerbe probed via CPS, it is not necessary to specify secondary CPUs. Required 15*e14ba3cdSAndrew Brestickerpropertis: 16*e14ba3cdSAndrew Bresticker - device_type: Must be "cpu". 17*e14ba3cdSAndrew Bresticker - compatible: Must be "mti,interaptiv". 18*e14ba3cdSAndrew Bresticker - reg: CPU number. 19*e14ba3cdSAndrew Bresticker - clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for 20*e14ba3cdSAndrew Bresticker details on clock bindings. 21*e14ba3cdSAndrew BrestickerExample: 22*e14ba3cdSAndrew Bresticker cpus { 23*e14ba3cdSAndrew Bresticker #address-cells = <1>; 24*e14ba3cdSAndrew Bresticker #size-cells = <0>; 25*e14ba3cdSAndrew Bresticker 26*e14ba3cdSAndrew Bresticker cpu0: cpu@0 { 27*e14ba3cdSAndrew Bresticker device_type = "cpu"; 28*e14ba3cdSAndrew Bresticker compatible = "mti,interaptiv"; 29*e14ba3cdSAndrew Bresticker reg = <0>; 30*e14ba3cdSAndrew Bresticker clocks = <&clk_core CLK_MIPS>; 31*e14ba3cdSAndrew Bresticker }; 32*e14ba3cdSAndrew Bresticker }; 33*e14ba3cdSAndrew Bresticker 34*e14ba3cdSAndrew Bresticker 35*e14ba3cdSAndrew BrestickerBoot protocol: 36*e14ba3cdSAndrew Bresticker-------------- 37*e14ba3cdSAndrew BrestickerIn accordance with the MIPS UHI specification[1], the bootloader must pass the 38*e14ba3cdSAndrew Brestickerfollowing arguments to the kernel: 39*e14ba3cdSAndrew Bresticker - $a0: -2. 40*e14ba3cdSAndrew Bresticker - $a1: KSEG0 address of the flattened device-tree blob. 41*e14ba3cdSAndrew Bresticker 42*e14ba3cdSAndrew Bresticker[1] http://prplfoundation.org/wiki/MIPS_documentation 43