xref: /linux/Documentation/devicetree/bindings/mips/cavium/dma-engine.txt (revision c4ee0af3fa0dc65f690fc908f02b8355f9576ea0)
1* DMA Engine.
2
3The Octeon DMA Engine transfers between the Boot Bus and main memory.
4The DMA Engine will be referred to by phandle by any device that is
5connected to it.
6
7Properties:
8- compatible: "cavium,octeon-5750-bootbus-dma"
9
10  Compatibility with all cn52XX, cn56XX and cn6XXX SOCs.
11
12- reg: The base address of the DMA Engine's register bank.
13
14- interrupts: A single interrupt specifier.
15
16Example:
17	dma0: dma-engine@1180000000100 {
18		compatible = "cavium,octeon-5750-bootbus-dma";
19		reg = <0x11800 0x00000100 0x0 0x8>;
20		interrupts = <0 63>;
21	};
22