xref: /linux/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml (revision f4eedebdbfbf42471d2d4a5364b0b92b4c15bf1d)
156fb34d8SBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
256fb34d8SBenjamin Gaignard%YAML 1.2
356fb34d8SBenjamin Gaignard---
456fb34d8SBenjamin Gaignard$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
556fb34d8SBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml#
656fb34d8SBenjamin Gaignard
756fb34d8SBenjamin Gaignardtitle: STMicroelectronics STM32 Timers bindings
856fb34d8SBenjamin Gaignard
956fb34d8SBenjamin Gaignarddescription: |
1056fb34d8SBenjamin Gaignard  This hardware block provides 3 types of timer along with PWM functionality:
1156fb34d8SBenjamin Gaignard    - advanced-control timers consist of a 16-bit auto-reload counter driven
1256fb34d8SBenjamin Gaignard      by a programmable prescaler, break input feature, PWM outputs and
1356fb34d8SBenjamin Gaignard      complementary PWM outputs channels.
1456fb34d8SBenjamin Gaignard    - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
1556fb34d8SBenjamin Gaignard      driven by a programmable prescaler and PWM outputs.
1656fb34d8SBenjamin Gaignard    - basic timers consist of a 16-bit auto-reload counter driven by a
1756fb34d8SBenjamin Gaignard      programmable prescaler.
1856fb34d8SBenjamin Gaignard
1956fb34d8SBenjamin Gaignardmaintainers:
20*f4eedebdSPatrice Chotard  - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
2156fb34d8SBenjamin Gaignard
2256fb34d8SBenjamin Gaignardproperties:
2356fb34d8SBenjamin Gaignard  compatible:
2456fb34d8SBenjamin Gaignard    const: st,stm32-timers
2556fb34d8SBenjamin Gaignard
2656fb34d8SBenjamin Gaignard  reg:
2756fb34d8SBenjamin Gaignard    maxItems: 1
2856fb34d8SBenjamin Gaignard
2956fb34d8SBenjamin Gaignard  clocks:
3056fb34d8SBenjamin Gaignard    maxItems: 1
3156fb34d8SBenjamin Gaignard
3256fb34d8SBenjamin Gaignard  clock-names:
3356fb34d8SBenjamin Gaignard    items:
3456fb34d8SBenjamin Gaignard      - const: int
3556fb34d8SBenjamin Gaignard
3656fb34d8SBenjamin Gaignard  reset:
3756fb34d8SBenjamin Gaignard    maxItems: 1
3856fb34d8SBenjamin Gaignard
3956fb34d8SBenjamin Gaignard  dmas:
4056fb34d8SBenjamin Gaignard    minItems: 1
4156fb34d8SBenjamin Gaignard    maxItems: 7
4256fb34d8SBenjamin Gaignard
4356fb34d8SBenjamin Gaignard  dma-names:
4456fb34d8SBenjamin Gaignard    items:
4556fb34d8SBenjamin Gaignard      enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
4656fb34d8SBenjamin Gaignard    minItems: 1
4756fb34d8SBenjamin Gaignard    maxItems: 7
4856fb34d8SBenjamin Gaignard
4956fb34d8SBenjamin Gaignard  "#address-cells":
5056fb34d8SBenjamin Gaignard    const: 1
5156fb34d8SBenjamin Gaignard
5256fb34d8SBenjamin Gaignard  "#size-cells":
5356fb34d8SBenjamin Gaignard    const: 0
5456fb34d8SBenjamin Gaignard
5556fb34d8SBenjamin Gaignard  pwm:
5656fb34d8SBenjamin Gaignard    type: object
5756fb34d8SBenjamin Gaignard
5856fb34d8SBenjamin Gaignard    properties:
5956fb34d8SBenjamin Gaignard      compatible:
6056fb34d8SBenjamin Gaignard        const: st,stm32-pwm
6156fb34d8SBenjamin Gaignard
6256fb34d8SBenjamin Gaignard      "#pwm-cells":
6356fb34d8SBenjamin Gaignard        const: 3
6456fb34d8SBenjamin Gaignard
6556fb34d8SBenjamin Gaignard      st,breakinput:
6656fb34d8SBenjamin Gaignard        description:
6756fb34d8SBenjamin Gaignard          One or two <index level filter> to describe break input
6856fb34d8SBenjamin Gaignard          configurations.
693d21a460SRob Herring        $ref: /schemas/types.yaml#/definitions/uint32-matrix
703d21a460SRob Herring        items:
7156fb34d8SBenjamin Gaignard          items:
7256fb34d8SBenjamin Gaignard            - description: |
7356fb34d8SBenjamin Gaignard                "index" indicates on which break input (0 or 1) the
7456fb34d8SBenjamin Gaignard                configuration should be applied.
7556fb34d8SBenjamin Gaignard              enum: [0, 1]
7656fb34d8SBenjamin Gaignard            - description: |
7756fb34d8SBenjamin Gaignard                "level" gives the active level (0=low or 1=high) of the
7856fb34d8SBenjamin Gaignard                input signal for this configuration
7956fb34d8SBenjamin Gaignard              enum: [0, 1]
8056fb34d8SBenjamin Gaignard            - description: |
8156fb34d8SBenjamin Gaignard                "filter" gives the filtering value (up to 15) to be applied.
8256fb34d8SBenjamin Gaignard              maximum: 15
8356fb34d8SBenjamin Gaignard        minItems: 1
8456fb34d8SBenjamin Gaignard        maxItems: 2
8556fb34d8SBenjamin Gaignard
8656fb34d8SBenjamin Gaignard    required:
8756fb34d8SBenjamin Gaignard      - "#pwm-cells"
8856fb34d8SBenjamin Gaignard      - compatible
8956fb34d8SBenjamin Gaignard
9056fb34d8SBenjamin GaignardpatternProperties:
9156fb34d8SBenjamin Gaignard  "^timer@[0-9]+$":
9256fb34d8SBenjamin Gaignard    type: object
9356fb34d8SBenjamin Gaignard
9456fb34d8SBenjamin Gaignard    properties:
9556fb34d8SBenjamin Gaignard      compatible:
9656fb34d8SBenjamin Gaignard        enum:
9756fb34d8SBenjamin Gaignard          - st,stm32-timer-trigger
9856fb34d8SBenjamin Gaignard          - st,stm32h7-timer-trigger
9956fb34d8SBenjamin Gaignard
10056fb34d8SBenjamin Gaignard      reg:
10156fb34d8SBenjamin Gaignard        description: Identify trigger hardware block.
10256fb34d8SBenjamin Gaignard        items:
10356fb34d8SBenjamin Gaignard          minimum: 0
10456fb34d8SBenjamin Gaignard          maximum: 16
10556fb34d8SBenjamin Gaignard
10656fb34d8SBenjamin Gaignard    required:
10756fb34d8SBenjamin Gaignard      - compatible
10856fb34d8SBenjamin Gaignard      - reg
10956fb34d8SBenjamin Gaignard
11056fb34d8SBenjamin Gaignard  counter:
11156fb34d8SBenjamin Gaignard    type: object
11256fb34d8SBenjamin Gaignard
11356fb34d8SBenjamin Gaignard    properties:
11456fb34d8SBenjamin Gaignard      compatible:
11556fb34d8SBenjamin Gaignard        const: st,stm32-timer-counter
11656fb34d8SBenjamin Gaignard
11756fb34d8SBenjamin Gaignard    required:
11856fb34d8SBenjamin Gaignard      - compatible
11956fb34d8SBenjamin Gaignard
12056fb34d8SBenjamin Gaignardrequired:
12156fb34d8SBenjamin Gaignard  - compatible
12256fb34d8SBenjamin Gaignard  - reg
12356fb34d8SBenjamin Gaignard  - clocks
12456fb34d8SBenjamin Gaignard  - clock-names
12556fb34d8SBenjamin Gaignard
12656fb34d8SBenjamin GaignardadditionalProperties: false
12756fb34d8SBenjamin Gaignard
12856fb34d8SBenjamin Gaignardexamples:
12956fb34d8SBenjamin Gaignard  - |
13056fb34d8SBenjamin Gaignard    #include <dt-bindings/clock/stm32mp1-clks.h>
1318f7e68bbSFabrice Gasnier    timers2: timer@40000000 {
13256fb34d8SBenjamin Gaignard      #address-cells = <1>;
13356fb34d8SBenjamin Gaignard      #size-cells = <0>;
13456fb34d8SBenjamin Gaignard      compatible = "st,stm32-timers";
13556fb34d8SBenjamin Gaignard      reg = <0x40000000 0x400>;
13656fb34d8SBenjamin Gaignard      clocks = <&rcc TIM2_K>;
13756fb34d8SBenjamin Gaignard      clock-names = "int";
13856fb34d8SBenjamin Gaignard      dmas = <&dmamux1 18 0x400 0x1>,
13956fb34d8SBenjamin Gaignard             <&dmamux1 19 0x400 0x1>,
14056fb34d8SBenjamin Gaignard             <&dmamux1 20 0x400 0x1>,
14156fb34d8SBenjamin Gaignard             <&dmamux1 21 0x400 0x1>,
14256fb34d8SBenjamin Gaignard             <&dmamux1 22 0x400 0x1>;
14356fb34d8SBenjamin Gaignard      dma-names = "ch1", "ch2", "ch3", "ch4", "up";
14456fb34d8SBenjamin Gaignard      pwm {
14556fb34d8SBenjamin Gaignard        compatible = "st,stm32-pwm";
14656fb34d8SBenjamin Gaignard        #pwm-cells = <3>;
14756fb34d8SBenjamin Gaignard        st,breakinput = <0 1 5>;
14856fb34d8SBenjamin Gaignard      };
1498f7e68bbSFabrice Gasnier      timer@1 {
15056fb34d8SBenjamin Gaignard        compatible = "st,stm32-timer-trigger";
1518f7e68bbSFabrice Gasnier        reg = <1>;
15256fb34d8SBenjamin Gaignard      };
15356fb34d8SBenjamin Gaignard      counter {
15456fb34d8SBenjamin Gaignard        compatible = "st,stm32-timer-counter";
15556fb34d8SBenjamin Gaignard      };
15656fb34d8SBenjamin Gaignard    };
15756fb34d8SBenjamin Gaignard
15856fb34d8SBenjamin Gaignard...
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