156fb34d8SBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 256fb34d8SBenjamin Gaignard%YAML 1.2 356fb34d8SBenjamin Gaignard--- 456fb34d8SBenjamin Gaignard$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 556fb34d8SBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 656fb34d8SBenjamin Gaignard 756fb34d8SBenjamin Gaignardtitle: STMicroelectronics STM32 Timers bindings 856fb34d8SBenjamin Gaignard 956fb34d8SBenjamin Gaignarddescription: | 1056fb34d8SBenjamin Gaignard This hardware block provides 3 types of timer along with PWM functionality: 1156fb34d8SBenjamin Gaignard - advanced-control timers consist of a 16-bit auto-reload counter driven 1256fb34d8SBenjamin Gaignard by a programmable prescaler, break input feature, PWM outputs and 1356fb34d8SBenjamin Gaignard complementary PWM outputs channels. 1456fb34d8SBenjamin Gaignard - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 1556fb34d8SBenjamin Gaignard driven by a programmable prescaler and PWM outputs. 1656fb34d8SBenjamin Gaignard - basic timers consist of a 16-bit auto-reload counter driven by a 1756fb34d8SBenjamin Gaignard programmable prescaler. 1856fb34d8SBenjamin Gaignard 1956fb34d8SBenjamin Gaignardmaintainers: 2056fb34d8SBenjamin Gaignard - Benjamin Gaignard <benjamin.gaignard@st.com> 2156fb34d8SBenjamin Gaignard - Fabrice Gasnier <fabrice.gasnier@st.com> 2256fb34d8SBenjamin Gaignard 2356fb34d8SBenjamin Gaignardproperties: 2456fb34d8SBenjamin Gaignard compatible: 2556fb34d8SBenjamin Gaignard const: st,stm32-timers 2656fb34d8SBenjamin Gaignard 2756fb34d8SBenjamin Gaignard reg: 2856fb34d8SBenjamin Gaignard maxItems: 1 2956fb34d8SBenjamin Gaignard 3056fb34d8SBenjamin Gaignard clocks: 3156fb34d8SBenjamin Gaignard maxItems: 1 3256fb34d8SBenjamin Gaignard 3356fb34d8SBenjamin Gaignard clock-names: 3456fb34d8SBenjamin Gaignard items: 3556fb34d8SBenjamin Gaignard - const: int 3656fb34d8SBenjamin Gaignard 3756fb34d8SBenjamin Gaignard reset: 3856fb34d8SBenjamin Gaignard maxItems: 1 3956fb34d8SBenjamin Gaignard 4056fb34d8SBenjamin Gaignard dmas: 4156fb34d8SBenjamin Gaignard minItems: 1 4256fb34d8SBenjamin Gaignard maxItems: 7 4356fb34d8SBenjamin Gaignard 4456fb34d8SBenjamin Gaignard dma-names: 4556fb34d8SBenjamin Gaignard items: 4656fb34d8SBenjamin Gaignard enum: [ ch1, ch2, ch3, ch4, up, trig, com ] 4756fb34d8SBenjamin Gaignard minItems: 1 4856fb34d8SBenjamin Gaignard maxItems: 7 4956fb34d8SBenjamin Gaignard 5056fb34d8SBenjamin Gaignard "#address-cells": 5156fb34d8SBenjamin Gaignard const: 1 5256fb34d8SBenjamin Gaignard 5356fb34d8SBenjamin Gaignard "#size-cells": 5456fb34d8SBenjamin Gaignard const: 0 5556fb34d8SBenjamin Gaignard 5656fb34d8SBenjamin Gaignard pwm: 5756fb34d8SBenjamin Gaignard type: object 5856fb34d8SBenjamin Gaignard 5956fb34d8SBenjamin Gaignard properties: 6056fb34d8SBenjamin Gaignard compatible: 6156fb34d8SBenjamin Gaignard const: st,stm32-pwm 6256fb34d8SBenjamin Gaignard 6356fb34d8SBenjamin Gaignard "#pwm-cells": 6456fb34d8SBenjamin Gaignard const: 3 6556fb34d8SBenjamin Gaignard 6656fb34d8SBenjamin Gaignard st,breakinput: 6756fb34d8SBenjamin Gaignard description: 6856fb34d8SBenjamin Gaignard One or two <index level filter> to describe break input 6956fb34d8SBenjamin Gaignard configurations. 703d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32-matrix 713d21a460SRob Herring items: 7256fb34d8SBenjamin Gaignard items: 7356fb34d8SBenjamin Gaignard - description: | 7456fb34d8SBenjamin Gaignard "index" indicates on which break input (0 or 1) the 7556fb34d8SBenjamin Gaignard configuration should be applied. 7656fb34d8SBenjamin Gaignard enum: [0, 1] 7756fb34d8SBenjamin Gaignard - description: | 7856fb34d8SBenjamin Gaignard "level" gives the active level (0=low or 1=high) of the 7956fb34d8SBenjamin Gaignard input signal for this configuration 8056fb34d8SBenjamin Gaignard enum: [0, 1] 8156fb34d8SBenjamin Gaignard - description: | 8256fb34d8SBenjamin Gaignard "filter" gives the filtering value (up to 15) to be applied. 8356fb34d8SBenjamin Gaignard maximum: 15 8456fb34d8SBenjamin Gaignard minItems: 1 8556fb34d8SBenjamin Gaignard maxItems: 2 8656fb34d8SBenjamin Gaignard 8756fb34d8SBenjamin Gaignard required: 8856fb34d8SBenjamin Gaignard - "#pwm-cells" 8956fb34d8SBenjamin Gaignard - compatible 9056fb34d8SBenjamin Gaignard 9156fb34d8SBenjamin GaignardpatternProperties: 9256fb34d8SBenjamin Gaignard "^timer@[0-9]+$": 9356fb34d8SBenjamin Gaignard type: object 9456fb34d8SBenjamin Gaignard 9556fb34d8SBenjamin Gaignard properties: 9656fb34d8SBenjamin Gaignard compatible: 9756fb34d8SBenjamin Gaignard enum: 9856fb34d8SBenjamin Gaignard - st,stm32-timer-trigger 9956fb34d8SBenjamin Gaignard - st,stm32h7-timer-trigger 10056fb34d8SBenjamin Gaignard 10156fb34d8SBenjamin Gaignard reg: 10256fb34d8SBenjamin Gaignard description: Identify trigger hardware block. 10356fb34d8SBenjamin Gaignard items: 10456fb34d8SBenjamin Gaignard minimum: 0 10556fb34d8SBenjamin Gaignard maximum: 16 10656fb34d8SBenjamin Gaignard 10756fb34d8SBenjamin Gaignard required: 10856fb34d8SBenjamin Gaignard - compatible 10956fb34d8SBenjamin Gaignard - reg 11056fb34d8SBenjamin Gaignard 11156fb34d8SBenjamin Gaignard counter: 11256fb34d8SBenjamin Gaignard type: object 11356fb34d8SBenjamin Gaignard 11456fb34d8SBenjamin Gaignard properties: 11556fb34d8SBenjamin Gaignard compatible: 11656fb34d8SBenjamin Gaignard const: st,stm32-timer-counter 11756fb34d8SBenjamin Gaignard 11856fb34d8SBenjamin Gaignard required: 11956fb34d8SBenjamin Gaignard - compatible 12056fb34d8SBenjamin Gaignard 12156fb34d8SBenjamin Gaignardrequired: 12256fb34d8SBenjamin Gaignard - "#address-cells" 12356fb34d8SBenjamin Gaignard - "#size-cells" 12456fb34d8SBenjamin Gaignard - compatible 12556fb34d8SBenjamin Gaignard - reg 12656fb34d8SBenjamin Gaignard - clocks 12756fb34d8SBenjamin Gaignard - clock-names 12856fb34d8SBenjamin Gaignard 12956fb34d8SBenjamin GaignardadditionalProperties: false 13056fb34d8SBenjamin Gaignard 13156fb34d8SBenjamin Gaignardexamples: 13256fb34d8SBenjamin Gaignard - | 13356fb34d8SBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 134*8f7e68bbSFabrice Gasnier timers2: timer@40000000 { 13556fb34d8SBenjamin Gaignard #address-cells = <1>; 13656fb34d8SBenjamin Gaignard #size-cells = <0>; 13756fb34d8SBenjamin Gaignard compatible = "st,stm32-timers"; 13856fb34d8SBenjamin Gaignard reg = <0x40000000 0x400>; 13956fb34d8SBenjamin Gaignard clocks = <&rcc TIM2_K>; 14056fb34d8SBenjamin Gaignard clock-names = "int"; 14156fb34d8SBenjamin Gaignard dmas = <&dmamux1 18 0x400 0x1>, 14256fb34d8SBenjamin Gaignard <&dmamux1 19 0x400 0x1>, 14356fb34d8SBenjamin Gaignard <&dmamux1 20 0x400 0x1>, 14456fb34d8SBenjamin Gaignard <&dmamux1 21 0x400 0x1>, 14556fb34d8SBenjamin Gaignard <&dmamux1 22 0x400 0x1>; 14656fb34d8SBenjamin Gaignard dma-names = "ch1", "ch2", "ch3", "ch4", "up"; 14756fb34d8SBenjamin Gaignard pwm { 14856fb34d8SBenjamin Gaignard compatible = "st,stm32-pwm"; 14956fb34d8SBenjamin Gaignard #pwm-cells = <3>; 15056fb34d8SBenjamin Gaignard st,breakinput = <0 1 5>; 15156fb34d8SBenjamin Gaignard }; 152*8f7e68bbSFabrice Gasnier timer@1 { 15356fb34d8SBenjamin Gaignard compatible = "st,stm32-timer-trigger"; 154*8f7e68bbSFabrice Gasnier reg = <1>; 15556fb34d8SBenjamin Gaignard }; 15656fb34d8SBenjamin Gaignard counter { 15756fb34d8SBenjamin Gaignard compatible = "st,stm32-timer-counter"; 15856fb34d8SBenjamin Gaignard }; 15956fb34d8SBenjamin Gaignard }; 16056fb34d8SBenjamin Gaignard 16156fb34d8SBenjamin Gaignard... 162