1MAX77620 Power management IC from Maxim Semiconductor. 2 3Required properties: 4------------------- 5- compatible: Must be one of 6 "maxim,max77620" 7 "maxim,max20024". 8- reg: I2C device address. 9 10Optional properties: 11------------------- 12- interrupts: The interrupt on the parent the controller is 13 connected to. 14- interrupt-controller: Marks the device node as an interrupt controller. 15- #interrupt-cells: is <2> and their usage is compliant to the 2 cells 16 variant of <../interrupt-controller/interrupts.txt> 17 IRQ numbers for different interrupt source of MAX77620 18 are defined at dt-bindings/mfd/max77620.h. 19 20Optional subnodes and their properties: 21======================================= 22 23Flexible power sequence configurations: 24-------------------------------------- 25The Flexible Power Sequencer (FPS) allows each regulator to power up under 26hardware or software control. Additionally, each regulator can power on 27independently or among a group of other regulators with an adjustable power-up 28and power-down delays (sequencing). GPIO1, GPIO2, and GPIO3 can be programmed 29to be part of a sequence allowing external regulators to be sequenced along 30with internal regulators. 32KHz clock can be programmed to be part of a 31sequence. 32 33The flexible sequencing structure consists of two hardware enable inputs 34(EN0, EN1), and 3 master sequencing timers called FPS0, FPS1 and FPS2. 35Each master sequencing timer is programmable through its configuration 36register to have a hardware enable source (EN1 or EN2) or a software enable 37source (SW). When enabled/disabled, the master sequencing timer generates 38eight sequencing events on different time periods called slots. The time 39period between each event is programmable within the configuration register. 40Each regulator, GPIO1, GPIO2, GPIO3, and 32KHz clock has a flexible power 41sequence slave register which allows its enable source to be specified as 42a flexible power sequencer timer or a software bit. When a FPS source of 43regulators, GPIOs and clocks specifies the enable source to be a flexible 44power sequencer, the power up and power down delays can be specified in 45the regulators, GPIOs and clocks flexible power sequencer configuration 46registers. 47 48When FPS event cleared (set to LOW), regulators, GPIOs and 32KHz 49clock are set into following state at the sequencing event that 50corresponds to its flexible sequencer configuration register. 51 Sleep state: In this state, regulators, GPIOs 52 and 32KHz clock get disabled at 53 the sequencing event. 54 Global Low Power Mode (GLPM): In this state, regulators are set in 55 low power mode at the sequencing event. 56 57The configuration parameters of FPS is provided through sub-node "fps" 58and their child for FPS specific. The child node name for FPS are "fps0", 59"fps1", and "fps2" for FPS0, FPS1 and FPS2 respectively. 60 61The FPS configurations like FPS source, power up and power down slots for 62regulators, GPIOs and 32kHz clocks are provided in their respective 63configuration nodes which is explained in respective sub-system DT 64binding document. 65 66There is need for different FPS configuration parameters based on system 67state like when system state changed from active to suspend or active to 68power off (shutdown). 69 70Optional properties: 71------------------- 72-maxim,fps-event-source: u32, FPS event source like external 73 hardware input to PMIC i.e. EN0, EN1 or 74 software (SW). 75 The macros are defined on 76 dt-bindings/mfd/max77620.h 77 for different control source. 78 - MAX77620_FPS_EVENT_SRC_EN0 79 for hardware input pin EN0. 80 - MAX77620_FPS_EVENT_SRC_EN1 81 for hardware input pin EN1. 82 - MAX77620_FPS_EVENT_SRC_SW 83 for software control. 84 85-maxim,shutdown-fps-time-period-us: u32, FPS time period in microseconds 86 when system enters in to shutdown 87 state. 88 89-maxim,suspend-fps-time-period-us: u32, FPS time period in microseconds 90 when system enters in to suspend state. 91 92-maxim,device-state-on-disabled-event: u32, describe the PMIC state when FPS 93 event cleared (set to LOW) whether it 94 should go to sleep state or low-power 95 state. Following are valid values: 96 - MAX77620_FPS_INACTIVE_STATE_SLEEP 97 to set the PMIC state to sleep. 98 - MAX77620_FPS_INACTIVE_STATE_LOW_POWER 99 to set the PMIC state to low 100 power. 101 Absence of this property or other value 102 will not change device state when FPS 103 event get cleared. 104 105Here supported time periods by device in microseconds are as follows: 106MAX77620 supports 40, 80, 160, 320, 640, 1280, 2560 and 5120 microseconds. 107MAX20024 supports 20, 40, 80, 160, 320, 640, 1280 and 2540 microseconds. 108 109For DT binding details of different sub modules like GPIO, pincontrol, 110regulator, power, please refer respective device-tree binding document 111under their respective sub-system directories. 112 113Example: 114-------- 115#include <dt-bindings/mfd/max77620.h> 116 117max77620@3c { 118 compatible = "maxim,max77620"; 119 reg = <0x3c>; 120 121 interrupt-parent = <&intc>; 122 interrupts = <0 86 IRQ_TYPE_NONE>; 123 124 interrupt-controller; 125 #interrupt-cells = <2>; 126 127 fps { 128 fps0 { 129 maxim,shutdown-fps-time-period-us = <1280>; 130 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 131 }; 132 133 fps1 { 134 maxim,shutdown-fps-time-period-us = <1280>; 135 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 136 }; 137 138 fps2 { 139 maxim,shutdown-fps-time-period-us = <1280>; 140 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_SW>; 141 }; 142 }; 143}; 144