1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mfd/brcm,cru.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Broadcom CRU 8 9maintainers: 10 - Rafał Miłecki <rafal@milecki.pl> 11 12description: | 13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware 14 block grouping smaller blocks. On Broadcom Northstar platform it contains e.g. 15 clocks, pinctrl, USB PHY and thermal. 16 17properties: 18 compatible: 19 items: 20 - enum: 21 - brcm,ns-cru 22 - const: simple-mfd 23 24 reg: 25 description: CRU registers 26 27 ranges: true 28 29 "#address-cells": 30 const: 1 31 32 "#size-cells": 33 const: 1 34 35patternProperties: 36 '^clock-controller@[a-f0-9]+$': 37 $ref: ../clock/brcm,iproc-clocks.yaml 38 39 '^pin-controller@[a-f0-9]+$': 40 $ref: ../pinctrl/brcm,ns-pinmux.yaml 41 42 '^thermal@[a-f0-9]+$': 43 $ref: ../thermal/brcm,ns-thermal.yaml 44 45additionalProperties: false 46 47required: 48 - reg 49 50examples: 51 - | 52 cru-bus@1800c100 { 53 compatible = "brcm,ns-cru", "simple-mfd"; 54 reg = <0x1800c100 0x1d0>; 55 ranges; 56 #address-cells = <1>; 57 #size-cells = <1>; 58 59 clock-controller@100 { 60 #clock-cells = <1>; 61 compatible = "brcm,nsp-lcpll0"; 62 reg = <0x100 0x14>; 63 clocks = <&osc>; 64 clock-output-names = "lcpll0", "pcie_phy", "sdio", "ddr_phy"; 65 }; 66 67 clock-controller@140 { 68 #clock-cells = <1>; 69 compatible = "brcm,nsp-genpll"; 70 reg = <0x140 0x24>; 71 clocks = <&osc>; 72 clock-output-names = "genpll", "phy", "ethernetclk", "usbclk", 73 "iprocfast", "sata1", "sata2"; 74 }; 75 76 pin-controller@1c0 { 77 compatible = "brcm,bcm4708-pinmux"; 78 reg = <0x1c0 0x24>; 79 reg-names = "cru_gpio_control"; 80 }; 81 82 thermal@2c0 { 83 compatible = "brcm,ns-thermal"; 84 reg = <0x2c0 0x10>; 85 #thermal-sensor-cells = <0>; 86 }; 87 }; 88