xref: /linux/Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/atmel,hlcdc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Atmel's HLCD Controller
8
9maintainers:
10  - Nicolas Ferre <nicolas.ferre@microchip.com>
11  - Alexandre Belloni <alexandre.belloni@bootlin.com>
12  - Claudiu Beznea <claudiu.beznea@tuxon.dev>
13
14description:
15  The Atmel HLCDC (HLCD Controller) IP available on Atmel SoCs exposes two
16  subdevices, a PWM chip and a Display Controller.
17
18properties:
19  compatible:
20    enum:
21      - atmel,at91sam9n12-hlcdc
22      - atmel,at91sam9x5-hlcdc
23      - atmel,sama5d2-hlcdc
24      - atmel,sama5d3-hlcdc
25      - atmel,sama5d4-hlcdc
26      - microchip,sam9x60-hlcdc
27      - microchip,sam9x75-xlcdc
28
29  reg:
30    maxItems: 1
31
32  interrupts:
33    maxItems: 1
34
35  clocks:
36    minItems: 3
37
38  clock-names:
39    items:
40      - const: periph_clk
41      - const: sys_clk
42      - const: slow_clk
43      - const: lvds_pll_clk
44    minItems: 3
45
46  display-controller:
47    $ref: /schemas/display/atmel/atmel,hlcdc-display-controller.yaml
48
49  pwm:
50    $ref: /schemas/pwm/atmel,hlcdc-pwm.yaml
51
52required:
53  - compatible
54  - reg
55  - clocks
56  - clock-names
57  - interrupts
58
59additionalProperties: false
60
61examples:
62  - |
63    #include <dt-bindings/clock/at91.h>
64    #include <dt-bindings/dma/at91.h>
65    #include <dt-bindings/interrupt-controller/arm-gic.h>
66
67    lcd_controller: lcd-controller@f0030000 {
68      compatible = "atmel,sama5d3-hlcdc";
69      reg = <0xf0030000 0x2000>;
70      clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
71      clock-names = "periph_clk", "sys_clk", "slow_clk";
72      interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
73
74      display-controller {
75        compatible = "atmel,hlcdc-display-controller";
76        pinctrl-names = "default";
77        pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
78        #address-cells = <1>;
79        #size-cells = <0>;
80
81        port@0 {
82          #address-cells = <1>;
83          #size-cells = <0>;
84          reg = <0>;
85
86          hlcdc_panel_output: endpoint@0 {
87            reg = <0>;
88            remote-endpoint = <&panel_input>;
89          };
90        };
91      };
92
93      pwm {
94        compatible = "atmel,hlcdc-pwm";
95        pinctrl-names = "default";
96        pinctrl-0 = <&pinctrl_lcd_pwm>;
97        #pwm-cells = <3>;
98      };
99    };
100