xref: /linux/Documentation/devicetree/bindings/mfd/allwinner,sun6i-a31-prcm.yaml (revision f9bff0e31881d03badf191d3b0005839391f5f2b) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A31 PRCM
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13deprecated: true
14
15properties:
16  compatible:
17    const: allwinner,sun6i-a31-prcm
18
19  reg:
20    maxItems: 1
21
22patternProperties:
23  "^.*_(clk|rst)$":
24    type: object
25    unevaluatedProperties: false
26
27    properties:
28      compatible:
29        enum:
30          - allwinner,sun4i-a10-mod0-clk
31          - allwinner,sun6i-a31-apb0-clk
32          - allwinner,sun6i-a31-apb0-gates-clk
33          - allwinner,sun6i-a31-ar100-clk
34          - allwinner,sun6i-a31-clock-reset
35          - fixed-factor-clock
36
37    allOf:
38      - if:
39          properties:
40            compatible:
41              contains:
42                const: fixed-factor-clock
43
44        then:
45          $ref: /schemas/clock/fixed-factor-clock.yaml#
46
47      - if:
48          properties:
49            compatible:
50              contains:
51                const: allwinner,sun4i-a10-mod0-clk
52
53        then:
54          properties:
55            "#clock-cells":
56              const: 0
57
58            # Already checked in the main schema
59            compatible: true
60
61            clocks:
62              maxItems: 2
63
64            clock-output-names:
65              maxItems: 1
66
67            phandle: true
68
69          required:
70            - "#clock-cells"
71            - compatible
72            - clocks
73            - clock-output-names
74
75          additionalProperties: false
76
77      - if:
78          properties:
79            compatible:
80              contains:
81                const: allwinner,sun6i-a31-apb0-clk
82
83        then:
84          properties:
85            "#clock-cells":
86              const: 0
87
88            # Already checked in the main schema
89            compatible: true
90
91            clocks:
92              maxItems: 1
93
94            clock-output-names:
95              maxItems: 1
96
97            phandle: true
98
99          required:
100            - "#clock-cells"
101            - compatible
102            - clocks
103            - clock-output-names
104
105          additionalProperties: false
106
107      - if:
108          properties:
109            compatible:
110              contains:
111                const: allwinner,sun6i-a31-apb0-gates-clk
112
113        then:
114          properties:
115            "#clock-cells":
116              const: 1
117              description: >
118                This additional argument passed to that clock is the
119                offset of the bit controlling this particular gate in
120                the register.
121
122            # Already checked in the main schema
123            compatible: true
124
125            clocks:
126              maxItems: 1
127
128            clock-output-names:
129              minItems: 1
130              maxItems: 32
131
132            phandle: true
133
134          required:
135            - "#clock-cells"
136            - compatible
137            - clocks
138            - clock-output-names
139
140          additionalProperties: false
141
142      - if:
143          properties:
144            compatible:
145              contains:
146                const: allwinner,sun6i-a31-ar100-clk
147
148        then:
149          properties:
150            "#clock-cells":
151              const: 0
152
153            # Already checked in the main schema
154            compatible: true
155
156            clocks:
157              maxItems: 4
158              description: >
159                The parent order must match the hardware programming
160                order.
161
162            clock-output-names:
163              maxItems: 1
164
165            phandle: true
166
167          required:
168            - "#clock-cells"
169            - compatible
170            - clocks
171            - clock-output-names
172
173          additionalProperties: false
174
175      - if:
176          properties:
177            compatible:
178              contains:
179                const: allwinner,sun6i-a31-clock-reset
180
181        then:
182          properties:
183            "#reset-cells":
184              const: 1
185
186            # Already checked in the main schema
187            compatible: true
188
189            phandle: true
190
191          required:
192            - "#reset-cells"
193            - compatible
194
195          additionalProperties: false
196
197required:
198  - compatible
199  - reg
200
201additionalProperties: false
202
203examples:
204  - |
205    #include <dt-bindings/clock/sun6i-a31-ccu.h>
206
207    prcm@1f01400 {
208        compatible = "allwinner,sun6i-a31-prcm";
209        reg = <0x01f01400 0x200>;
210
211        ar100: ar100_clk {
212            compatible = "allwinner,sun6i-a31-ar100-clk";
213            #clock-cells = <0>;
214            clocks = <&rtc 0>, <&osc24M>,
215                     <&ccu CLK_PLL_PERIPH>,
216                     <&ccu CLK_PLL_PERIPH>;
217            clock-output-names = "ar100";
218        };
219
220        ahb0: ahb0_clk {
221            compatible = "fixed-factor-clock";
222            #clock-cells = <0>;
223            clock-div = <1>;
224            clock-mult = <1>;
225            clocks = <&ar100>;
226            clock-output-names = "ahb0";
227        };
228
229        apb0: apb0_clk {
230            compatible = "allwinner,sun6i-a31-apb0-clk";
231            #clock-cells = <0>;
232            clocks = <&ahb0>;
233            clock-output-names = "apb0";
234        };
235
236        apb0_gates: apb0_gates_clk {
237            compatible = "allwinner,sun6i-a31-apb0-gates-clk";
238            #clock-cells = <1>;
239            clocks = <&apb0>;
240            clock-output-names = "apb0_pio", "apb0_ir",
241                                 "apb0_timer", "apb0_p2wi",
242                                 "apb0_uart", "apb0_1wire",
243                                 "apb0_i2c";
244        };
245
246        ir_clk: ir_clk {
247            #clock-cells = <0>;
248            compatible = "allwinner,sun4i-a10-mod0-clk";
249            clocks = <&rtc 0>, <&osc24M>;
250            clock-output-names = "ir";
251        };
252
253        apb0_rst: apb0_rst {
254            compatible = "allwinner,sun6i-a31-clock-reset";
255            #reset-cells = <1>;
256        };
257    };
258
259...
260