1af287ed0SMaxime Ripard# SPDX-License-Identifier: GPL-2.0+ 2af287ed0SMaxime Ripard%YAML 1.2 3af287ed0SMaxime Ripard--- 4af287ed0SMaxime Ripard$id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml# 5af287ed0SMaxime Ripard$schema: http://devicetree.org/meta-schemas/core.yaml# 6af287ed0SMaxime Ripard 7dd3cb467SAndrew Lunntitle: Allwinner A23 PRCM 8af287ed0SMaxime Ripard 9af287ed0SMaxime Ripardmaintainers: 10af287ed0SMaxime Ripard - Chen-Yu Tsai <wens@csie.org> 11af287ed0SMaxime Ripard - Maxime Ripard <mripard@kernel.org> 12af287ed0SMaxime Ripard 13af287ed0SMaxime Riparddeprecated: true 14af287ed0SMaxime Ripard 15af287ed0SMaxime Ripardproperties: 16af287ed0SMaxime Ripard compatible: 17af287ed0SMaxime Ripard const: allwinner,sun8i-a23-prcm 18af287ed0SMaxime Ripard 19af287ed0SMaxime Ripard reg: 20af287ed0SMaxime Ripard maxItems: 1 21af287ed0SMaxime Ripard 22af287ed0SMaxime RipardpatternProperties: 23af287ed0SMaxime Ripard "^.*(clk|rst|codec).*$": 24af287ed0SMaxime Ripard type: object 25*42839dcaSRob Herring unevaluatedProperties: false 26af287ed0SMaxime Ripard 27af287ed0SMaxime Ripard properties: 28af287ed0SMaxime Ripard compatible: 29af287ed0SMaxime Ripard enum: 30af287ed0SMaxime Ripard - fixed-factor-clock 31af287ed0SMaxime Ripard - allwinner,sun8i-a23-apb0-clk 32af287ed0SMaxime Ripard - allwinner,sun8i-a23-apb0-gates-clk 33af287ed0SMaxime Ripard - allwinner,sun6i-a31-clock-reset 34af287ed0SMaxime Ripard - allwinner,sun8i-a23-codec-analog 35af287ed0SMaxime Ripard 36af287ed0SMaxime Ripard required: 37af287ed0SMaxime Ripard - compatible 38af287ed0SMaxime Ripard 39af287ed0SMaxime Ripard allOf: 40af287ed0SMaxime Ripard - if: 41af287ed0SMaxime Ripard properties: 42af287ed0SMaxime Ripard compatible: 43af287ed0SMaxime Ripard contains: 44*42839dcaSRob Herring const: fixed-factor-clock 45*42839dcaSRob Herring 46*42839dcaSRob Herring then: 47*42839dcaSRob Herring $ref: /schemas/clock/fixed-factor-clock.yaml# 48*42839dcaSRob Herring 49*42839dcaSRob Herring - if: 50*42839dcaSRob Herring properties: 51*42839dcaSRob Herring compatible: 52*42839dcaSRob Herring contains: 53af287ed0SMaxime Ripard const: allwinner,sun8i-a23-apb0-clk 54af287ed0SMaxime Ripard 55af287ed0SMaxime Ripard then: 56af287ed0SMaxime Ripard properties: 57af287ed0SMaxime Ripard "#clock-cells": 58af287ed0SMaxime Ripard const: 0 59af287ed0SMaxime Ripard 60af287ed0SMaxime Ripard clocks: 61af287ed0SMaxime Ripard maxItems: 1 62af287ed0SMaxime Ripard 63af287ed0SMaxime Ripard clock-output-names: 64af287ed0SMaxime Ripard maxItems: 1 65af287ed0SMaxime Ripard 66af287ed0SMaxime Ripard required: 67af287ed0SMaxime Ripard - "#clock-cells" 68af287ed0SMaxime Ripard - clocks 69af287ed0SMaxime Ripard - clock-output-names 70af287ed0SMaxime Ripard 71af287ed0SMaxime Ripard - if: 72af287ed0SMaxime Ripard properties: 73af287ed0SMaxime Ripard compatible: 74af287ed0SMaxime Ripard contains: 75af287ed0SMaxime Ripard const: allwinner,sun8i-a23-apb0-gates-clk 76af287ed0SMaxime Ripard 77af287ed0SMaxime Ripard then: 78af287ed0SMaxime Ripard properties: 79af287ed0SMaxime Ripard "#clock-cells": 80af287ed0SMaxime Ripard const: 1 81af287ed0SMaxime Ripard description: > 82af287ed0SMaxime Ripard This additional argument passed to that clock is the 83af287ed0SMaxime Ripard offset of the bit controlling this particular gate in 84af287ed0SMaxime Ripard the register. 85af287ed0SMaxime Ripard 86af287ed0SMaxime Ripard clocks: 87af287ed0SMaxime Ripard maxItems: 1 88af287ed0SMaxime Ripard 89af287ed0SMaxime Ripard clock-output-names: 90af287ed0SMaxime Ripard minItems: 1 91af287ed0SMaxime Ripard maxItems: 32 92af287ed0SMaxime Ripard 93af287ed0SMaxime Ripard required: 94af287ed0SMaxime Ripard - "#clock-cells" 95af287ed0SMaxime Ripard - clocks 96af287ed0SMaxime Ripard - clock-output-names 97af287ed0SMaxime Ripard 98af287ed0SMaxime Ripard - if: 99af287ed0SMaxime Ripard properties: 100af287ed0SMaxime Ripard compatible: 101af287ed0SMaxime Ripard contains: 102af287ed0SMaxime Ripard const: allwinner,sun6i-a31-clock-reset 103af287ed0SMaxime Ripard 104af287ed0SMaxime Ripard then: 105af287ed0SMaxime Ripard properties: 106af287ed0SMaxime Ripard "#reset-cells": 107af287ed0SMaxime Ripard const: 1 108af287ed0SMaxime Ripard 109af287ed0SMaxime Ripard required: 110af287ed0SMaxime Ripard - "#reset-cells" 111af287ed0SMaxime Ripard 112af287ed0SMaxime Ripardrequired: 113af287ed0SMaxime Ripard - compatible 114af287ed0SMaxime Ripard - reg 115af287ed0SMaxime Ripard 116af287ed0SMaxime RipardadditionalProperties: false 117af287ed0SMaxime Ripard 118af287ed0SMaxime Ripardexamples: 119af287ed0SMaxime Ripard - | 120af287ed0SMaxime Ripard prcm@1f01400 { 121af287ed0SMaxime Ripard compatible = "allwinner,sun8i-a23-prcm"; 122af287ed0SMaxime Ripard reg = <0x01f01400 0x200>; 123af287ed0SMaxime Ripard 124af287ed0SMaxime Ripard ar100: ar100_clk { 125af287ed0SMaxime Ripard compatible = "fixed-factor-clock"; 126af287ed0SMaxime Ripard #clock-cells = <0>; 127af287ed0SMaxime Ripard clock-div = <1>; 128af287ed0SMaxime Ripard clock-mult = <1>; 129af287ed0SMaxime Ripard clocks = <&osc24M>; 130af287ed0SMaxime Ripard clock-output-names = "ar100"; 131af287ed0SMaxime Ripard }; 132af287ed0SMaxime Ripard 133af287ed0SMaxime Ripard ahb0: ahb0_clk { 134af287ed0SMaxime Ripard compatible = "fixed-factor-clock"; 135af287ed0SMaxime Ripard #clock-cells = <0>; 136af287ed0SMaxime Ripard clock-div = <1>; 137af287ed0SMaxime Ripard clock-mult = <1>; 138af287ed0SMaxime Ripard clocks = <&ar100>; 139af287ed0SMaxime Ripard clock-output-names = "ahb0"; 140af287ed0SMaxime Ripard }; 141af287ed0SMaxime Ripard 142af287ed0SMaxime Ripard apb0: apb0_clk { 143af287ed0SMaxime Ripard compatible = "allwinner,sun8i-a23-apb0-clk"; 144af287ed0SMaxime Ripard #clock-cells = <0>; 145af287ed0SMaxime Ripard clocks = <&ahb0>; 146af287ed0SMaxime Ripard clock-output-names = "apb0"; 147af287ed0SMaxime Ripard }; 148af287ed0SMaxime Ripard 149af287ed0SMaxime Ripard apb0_gates: apb0_gates_clk { 150af287ed0SMaxime Ripard compatible = "allwinner,sun8i-a23-apb0-gates-clk"; 151af287ed0SMaxime Ripard #clock-cells = <1>; 152af287ed0SMaxime Ripard clocks = <&apb0>; 153af287ed0SMaxime Ripard clock-output-names = "apb0_pio", "apb0_timer", 154af287ed0SMaxime Ripard "apb0_rsb", "apb0_uart", 155af287ed0SMaxime Ripard "apb0_i2c"; 156af287ed0SMaxime Ripard }; 157af287ed0SMaxime Ripard 158af287ed0SMaxime Ripard apb0_rst: apb0_rst { 159af287ed0SMaxime Ripard compatible = "allwinner,sun6i-a31-clock-reset"; 160af287ed0SMaxime Ripard #reset-cells = <1>; 161af287ed0SMaxime Ripard }; 162af287ed0SMaxime Ripard 163af287ed0SMaxime Ripard codec_analog: codec-analog { 164af287ed0SMaxime Ripard compatible = "allwinner,sun8i-a23-codec-analog"; 165af287ed0SMaxime Ripard }; 166af287ed0SMaxime Ripard }; 167af287ed0SMaxime Ripard 168af287ed0SMaxime Ripard... 169