xref: /linux/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml (revision e7d759f31ca295d589f7420719c311870bb3166f)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments GPMC Bus Child Nodes
8
9maintainers:
10  - Tony Lindgren <tony@atomide.com>
11  - Roger Quadros <rogerq@kernel.org>
12
13description:
14  This binding is meant for the child nodes of the GPMC node. The node
15  represents any device connected to the GPMC bus. It may be a Flash chip,
16  RAM chip or Ethernet controller, etc. These properties are meant for
17  configuring the GPMC settings/timings and will accompany the bindings
18  supported by the respective device.
19
20properties:
21  reg: true
22
23# GPMC Timing properties for child nodes. All are optional and default to 0.
24  gpmc,sync-clk-ps:
25    description: Minimum clock period for synchronous mode
26    default: 0
27
28# Chip-select signal timings corresponding to GPMC_CONFIG2:
29  gpmc,cs-on-ns:
30    description: Assertion time
31    default: 0
32
33  gpmc,cs-rd-off-ns:
34    description: Read deassertion time
35    default: 0
36
37  gpmc,cs-wr-off-ns:
38    description: Write deassertion time
39    default: 0
40
41# ADV signal timings corresponding to GPMC_CONFIG3:
42  gpmc,adv-on-ns:
43    description: Assertion time
44    default: 0
45
46  gpmc,adv-rd-off-ns:
47    description: Read deassertion time
48    default: 0
49
50  gpmc,adv-wr-off-ns:
51    description: Write deassertion time
52    default: 0
53
54  gpmc,adv-aad-mux-on-ns:
55    description: Assertion time for AAD
56    default: 0
57
58  gpmc,adv-aad-mux-rd-off-ns:
59    description: Read deassertion time for AAD
60    default: 0
61
62  gpmc,adv-aad-mux-wr-off-ns:
63    description: Write deassertion time for AAD
64    default: 0
65
66# WE signals timings corresponding to GPMC_CONFIG4:
67  gpmc,we-on-ns:
68    description: Assertion time
69    default: 0
70
71  gpmc,we-off-ns:
72    description: Deassertion time
73    default: 0
74
75# OE signals timings corresponding to GPMC_CONFIG4:
76  gpmc,oe-on-ns:
77    description: Assertion time
78    default: 0
79
80  gpmc,oe-off-ns:
81    description: Deassertion time
82    default: 0
83
84  gpmc,oe-aad-mux-on-ns:
85    description: Assertion time for AAD
86    default: 0
87
88  gpmc,oe-aad-mux-off-ns:
89    description: Deassertion time for AAD
90    default: 0
91
92# Access time and cycle time timings (in nanoseconds) corresponding to
93# GPMC_CONFIG5:
94  gpmc,page-burst-access-ns:
95    description: Multiple access word delay
96    default: 0
97
98  gpmc,access-ns:
99    description: Start-cycle to first data valid delay
100    default: 0
101
102  gpmc,rd-cycle-ns:
103    description: Total read cycle time
104    default: 0
105
106  gpmc,wr-cycle-ns:
107    description: Total write cycle time
108    default: 0
109
110  gpmc,bus-turnaround-ns:
111    description: Turn-around time between successive accesses
112    default: 0
113
114  gpmc,cycle2cycle-delay-ns:
115    description: Delay between chip-select pulses
116    default: 0
117
118  gpmc,clk-activation-ns:
119    description: GPMC clock activation time
120    default: 0
121
122  gpmc,wait-monitoring-ns:
123    description: Start of wait monitoring with regard to valid data
124    default: 0
125
126# Boolean timing parameters. If property is present, parameter is enabled
127# otherwise disabled.
128  gpmc,adv-extra-delay:
129    description: ADV signal is delayed by half GPMC clock
130    type: boolean
131
132  gpmc,cs-extra-delay:
133    description: CS signal is delayed by half GPMC clock
134    type: boolean
135
136  gpmc,cycle2cycle-diffcsen:
137    description: |
138      Add "cycle2cycle-delay" between successive accesses
139      to a different CS
140    type: boolean
141
142  gpmc,cycle2cycle-samecsen:
143    description: |
144      Add "cycle2cycle-delay" between successive accesses
145      to the same CS
146    type: boolean
147
148  gpmc,oe-extra-delay:
149    description: OE signal is delayed by half GPMC clock
150    type: boolean
151
152  gpmc,we-extra-delay:
153    description: WE signal is delayed by half GPMC clock
154    type: boolean
155
156  gpmc,time-para-granularity:
157    description: Multiply all access times by 2
158    type: boolean
159
160# The following two properties are applicable only to OMAP3+ and AM335x:
161  gpmc,wr-access-ns:
162    description: |
163      In synchronous write mode, for single or
164      burst accesses, defines the number of
165      GPMC_FCLK cycles from start access time
166      to the GPMC_CLK rising edge used by the
167      memory device for the first data capture.
168    default: 0
169
170  gpmc,wr-data-mux-bus-ns:
171    description: |
172      In address-data multiplex mode, specifies
173      the time when the first data is driven on
174      the address-data bus.
175    default: 0
176
177# GPMC chip-select settings properties for child nodes. All are optional.
178  gpmc,burst-length:
179    description: Page/burst length.
180    $ref: /schemas/types.yaml#/definitions/uint32
181    enum: [0, 4, 8, 16]
182    default: 0
183
184  gpmc,burst-wrap:
185    description: Enables wrap bursting
186    type: boolean
187
188  gpmc,burst-read:
189    description: Enables read page/burst mode
190    type: boolean
191
192  gpmc,burst-write:
193    description: Enables write page/burst mode
194    type: boolean
195
196  gpmc,device-width:
197    description: |
198      Total width of device(s) connected to a GPMC
199      chip-select in bytes. The GPMC supports 8-bit
200      and 16-bit devices and so this property must be
201      1 or 2.
202    $ref: /schemas/types.yaml#/definitions/uint32
203    enum: [1, 2]
204    default: 1
205
206  gpmc,mux-add-data:
207    description: |
208      Address and data multiplexing configuration.
209      Valid values are
210      0 for Non multiplexed mode
211      1 for address-address-data multiplexing mode and
212      2 for address-data multiplexing mode.
213    $ref: /schemas/types.yaml#/definitions/uint32
214    enum: [0, 1, 2]
215
216  gpmc,sync-read:
217    description: |
218      Enables synchronous read. Defaults to asynchronous
219      is this is not set.
220    type: boolean
221
222  gpmc,sync-write:
223    description: |
224      Enables synchronous writes. Defaults to asynchronous
225      is this is not set.
226    type: boolean
227
228  gpmc,wait-pin:
229    description: |
230      Wait-pin used by client. Must be less than "gpmc,num-waitpins".
231    $ref: /schemas/types.yaml#/definitions/uint32
232
233  ti,wait-pin-polarity:
234    description: |
235      Set the desired polarity for the selected wait pin.
236      0 for active low, 1 for active high.
237    $ref: /schemas/types.yaml#/definitions/uint32
238    enum: [0, 1]
239
240  gpmc,wait-on-read:
241    description: Enables wait monitoring on reads.
242    type: boolean
243
244  gpmc,wait-on-write:
245    description: Enables wait monitoring on writes.
246    type: boolean
247
248required:
249  - reg
250
251# the GPMC child will have its own native properties
252additionalProperties: true
253