104f461f3SRoger Quadros# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 204f461f3SRoger Quadros%YAML 1.2 304f461f3SRoger Quadros--- 404f461f3SRoger Quadros$id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml# 504f461f3SRoger Quadros$schema: http://devicetree.org/meta-schemas/core.yaml# 604f461f3SRoger Quadros 7*9d94e285SKrzysztof Kozlowskititle: Texas Instruments GPMC Bus Child Nodes 804f461f3SRoger Quadros 904f461f3SRoger Quadrosmaintainers: 1004f461f3SRoger Quadros - Tony Lindgren <tony@atomide.com> 1104f461f3SRoger Quadros - Roger Quadros <rogerq@kernel.org> 1204f461f3SRoger Quadros 1304f461f3SRoger Quadrosdescription: 1404f461f3SRoger Quadros This binding is meant for the child nodes of the GPMC node. The node 1504f461f3SRoger Quadros represents any device connected to the GPMC bus. It may be a Flash chip, 1604f461f3SRoger Quadros RAM chip or Ethernet controller, etc. These properties are meant for 1704f461f3SRoger Quadros configuring the GPMC settings/timings and will accompany the bindings 1804f461f3SRoger Quadros supported by the respective device. 1904f461f3SRoger Quadros 2004f461f3SRoger Quadrosproperties: 2104f461f3SRoger Quadros reg: true 2204f461f3SRoger Quadros 2304f461f3SRoger Quadros# GPMC Timing properties for child nodes. All are optional and default to 0. 2404f461f3SRoger Quadros gpmc,sync-clk-ps: 2504f461f3SRoger Quadros description: Minimum clock period for synchronous mode 2604f461f3SRoger Quadros default: 0 2704f461f3SRoger Quadros 2804f461f3SRoger Quadros# Chip-select signal timings corresponding to GPMC_CONFIG2: 2904f461f3SRoger Quadros gpmc,cs-on-ns: 3004f461f3SRoger Quadros description: Assertion time 3104f461f3SRoger Quadros default: 0 3204f461f3SRoger Quadros 3304f461f3SRoger Quadros gpmc,cs-rd-off-ns: 3404f461f3SRoger Quadros description: Read deassertion time 3504f461f3SRoger Quadros default: 0 3604f461f3SRoger Quadros 3704f461f3SRoger Quadros gpmc,cs-wr-off-ns: 3804f461f3SRoger Quadros description: Write deassertion time 3904f461f3SRoger Quadros default: 0 4004f461f3SRoger Quadros 4104f461f3SRoger Quadros# ADV signal timings corresponding to GPMC_CONFIG3: 4204f461f3SRoger Quadros gpmc,adv-on-ns: 4304f461f3SRoger Quadros description: Assertion time 4404f461f3SRoger Quadros default: 0 4504f461f3SRoger Quadros 4604f461f3SRoger Quadros gpmc,adv-rd-off-ns: 4704f461f3SRoger Quadros description: Read deassertion time 4804f461f3SRoger Quadros default: 0 4904f461f3SRoger Quadros 5004f461f3SRoger Quadros gpmc,adv-wr-off-ns: 5104f461f3SRoger Quadros description: Write deassertion time 5204f461f3SRoger Quadros default: 0 5304f461f3SRoger Quadros 5404f461f3SRoger Quadros gpmc,adv-aad-mux-on-ns: 5504f461f3SRoger Quadros description: Assertion time for AAD 5604f461f3SRoger Quadros default: 0 5704f461f3SRoger Quadros 5804f461f3SRoger Quadros gpmc,adv-aad-mux-rd-off-ns: 5904f461f3SRoger Quadros description: Read deassertion time for AAD 6004f461f3SRoger Quadros default: 0 6104f461f3SRoger Quadros 6204f461f3SRoger Quadros gpmc,adv-aad-mux-wr-off-ns: 6304f461f3SRoger Quadros description: Write deassertion time for AAD 6404f461f3SRoger Quadros default: 0 6504f461f3SRoger Quadros 6604f461f3SRoger Quadros# WE signals timings corresponding to GPMC_CONFIG4: 6704f461f3SRoger Quadros gpmc,we-on-ns: 6804f461f3SRoger Quadros description: Assertion time 6904f461f3SRoger Quadros default: 0 7004f461f3SRoger Quadros 7104f461f3SRoger Quadros gpmc,we-off-ns: 7204f461f3SRoger Quadros description: Deassertion time 7304f461f3SRoger Quadros default: 0 7404f461f3SRoger Quadros 7504f461f3SRoger Quadros# OE signals timings corresponding to GPMC_CONFIG4: 7604f461f3SRoger Quadros gpmc,oe-on-ns: 7704f461f3SRoger Quadros description: Assertion time 7804f461f3SRoger Quadros default: 0 7904f461f3SRoger Quadros 8004f461f3SRoger Quadros gpmc,oe-off-ns: 8104f461f3SRoger Quadros description: Deassertion time 8204f461f3SRoger Quadros default: 0 8304f461f3SRoger Quadros 8404f461f3SRoger Quadros gpmc,oe-aad-mux-on-ns: 8504f461f3SRoger Quadros description: Assertion time for AAD 8604f461f3SRoger Quadros default: 0 8704f461f3SRoger Quadros 8804f461f3SRoger Quadros gpmc,oe-aad-mux-off-ns: 8904f461f3SRoger Quadros description: Deassertion time for AAD 9004f461f3SRoger Quadros default: 0 9104f461f3SRoger Quadros 9204f461f3SRoger Quadros# Access time and cycle time timings (in nanoseconds) corresponding to 9304f461f3SRoger Quadros# GPMC_CONFIG5: 9404f461f3SRoger Quadros gpmc,page-burst-access-ns: 9504f461f3SRoger Quadros description: Multiple access word delay 9604f461f3SRoger Quadros default: 0 9704f461f3SRoger Quadros 9804f461f3SRoger Quadros gpmc,access-ns: 9904f461f3SRoger Quadros description: Start-cycle to first data valid delay 10004f461f3SRoger Quadros default: 0 10104f461f3SRoger Quadros 10204f461f3SRoger Quadros gpmc,rd-cycle-ns: 10304f461f3SRoger Quadros description: Total read cycle time 10404f461f3SRoger Quadros default: 0 10504f461f3SRoger Quadros 10604f461f3SRoger Quadros gpmc,wr-cycle-ns: 10704f461f3SRoger Quadros description: Total write cycle time 10804f461f3SRoger Quadros default: 0 10904f461f3SRoger Quadros 11004f461f3SRoger Quadros gpmc,bus-turnaround-ns: 11104f461f3SRoger Quadros description: Turn-around time between successive accesses 11204f461f3SRoger Quadros default: 0 11304f461f3SRoger Quadros 11404f461f3SRoger Quadros gpmc,cycle2cycle-delay-ns: 11504f461f3SRoger Quadros description: Delay between chip-select pulses 11604f461f3SRoger Quadros default: 0 11704f461f3SRoger Quadros 11804f461f3SRoger Quadros gpmc,clk-activation-ns: 11904f461f3SRoger Quadros description: GPMC clock activation time 12004f461f3SRoger Quadros default: 0 12104f461f3SRoger Quadros 12204f461f3SRoger Quadros gpmc,wait-monitoring-ns: 12304f461f3SRoger Quadros description: Start of wait monitoring with regard to valid data 12404f461f3SRoger Quadros default: 0 12504f461f3SRoger Quadros 12604f461f3SRoger Quadros# Boolean timing parameters. If property is present, parameter is enabled 12704f461f3SRoger Quadros# otherwise disabled. 12804f461f3SRoger Quadros gpmc,adv-extra-delay: 12904f461f3SRoger Quadros description: ADV signal is delayed by half GPMC clock 13004f461f3SRoger Quadros type: boolean 13104f461f3SRoger Quadros 13204f461f3SRoger Quadros gpmc,cs-extra-delay: 13304f461f3SRoger Quadros description: CS signal is delayed by half GPMC clock 13404f461f3SRoger Quadros type: boolean 13504f461f3SRoger Quadros 13604f461f3SRoger Quadros gpmc,cycle2cycle-diffcsen: 13704f461f3SRoger Quadros description: | 13804f461f3SRoger Quadros Add "cycle2cycle-delay" between successive accesses 13904f461f3SRoger Quadros to a different CS 14004f461f3SRoger Quadros type: boolean 14104f461f3SRoger Quadros 14204f461f3SRoger Quadros gpmc,cycle2cycle-samecsen: 14304f461f3SRoger Quadros description: | 14404f461f3SRoger Quadros Add "cycle2cycle-delay" between successive accesses 14504f461f3SRoger Quadros to the same CS 14604f461f3SRoger Quadros type: boolean 14704f461f3SRoger Quadros 14804f461f3SRoger Quadros gpmc,oe-extra-delay: 14904f461f3SRoger Quadros description: OE signal is delayed by half GPMC clock 15004f461f3SRoger Quadros type: boolean 15104f461f3SRoger Quadros 15204f461f3SRoger Quadros gpmc,we-extra-delay: 15304f461f3SRoger Quadros description: WE signal is delayed by half GPMC clock 15404f461f3SRoger Quadros type: boolean 15504f461f3SRoger Quadros 15604f461f3SRoger Quadros gpmc,time-para-granularity: 15704f461f3SRoger Quadros description: Multiply all access times by 2 15804f461f3SRoger Quadros type: boolean 15904f461f3SRoger Quadros 16004f461f3SRoger Quadros# The following two properties are applicable only to OMAP3+ and AM335x: 16104f461f3SRoger Quadros gpmc,wr-access-ns: 16204f461f3SRoger Quadros description: | 16304f461f3SRoger Quadros In synchronous write mode, for single or 16404f461f3SRoger Quadros burst accesses, defines the number of 16504f461f3SRoger Quadros GPMC_FCLK cycles from start access time 16604f461f3SRoger Quadros to the GPMC_CLK rising edge used by the 16704f461f3SRoger Quadros memory device for the first data capture. 16804f461f3SRoger Quadros default: 0 16904f461f3SRoger Quadros 17004f461f3SRoger Quadros gpmc,wr-data-mux-bus-ns: 17104f461f3SRoger Quadros description: | 17204f461f3SRoger Quadros In address-data multiplex mode, specifies 17304f461f3SRoger Quadros the time when the first data is driven on 17404f461f3SRoger Quadros the address-data bus. 17504f461f3SRoger Quadros default: 0 17604f461f3SRoger Quadros 17704f461f3SRoger Quadros# GPMC chip-select settings properties for child nodes. All are optional. 17804f461f3SRoger Quadros gpmc,burst-length: 17904f461f3SRoger Quadros description: Page/burst length. 18004f461f3SRoger Quadros $ref: /schemas/types.yaml#/definitions/uint32 18104f461f3SRoger Quadros enum: [0, 4, 8, 16] 18204f461f3SRoger Quadros default: 0 18304f461f3SRoger Quadros 18404f461f3SRoger Quadros gpmc,burst-wrap: 18504f461f3SRoger Quadros description: Enables wrap bursting 18604f461f3SRoger Quadros type: boolean 18704f461f3SRoger Quadros 18804f461f3SRoger Quadros gpmc,burst-read: 18904f461f3SRoger Quadros description: Enables read page/burst mode 19004f461f3SRoger Quadros type: boolean 19104f461f3SRoger Quadros 19204f461f3SRoger Quadros gpmc,burst-write: 19304f461f3SRoger Quadros description: Enables write page/burst mode 19404f461f3SRoger Quadros type: boolean 19504f461f3SRoger Quadros 19604f461f3SRoger Quadros gpmc,device-width: 19704f461f3SRoger Quadros description: | 19804f461f3SRoger Quadros Total width of device(s) connected to a GPMC 19904f461f3SRoger Quadros chip-select in bytes. The GPMC supports 8-bit 20004f461f3SRoger Quadros and 16-bit devices and so this property must be 20104f461f3SRoger Quadros 1 or 2. 20204f461f3SRoger Quadros $ref: /schemas/types.yaml#/definitions/uint32 20304f461f3SRoger Quadros enum: [1, 2] 20404f461f3SRoger Quadros default: 1 20504f461f3SRoger Quadros 20604f461f3SRoger Quadros gpmc,mux-add-data: 20704f461f3SRoger Quadros description: | 20804f461f3SRoger Quadros Address and data multiplexing configuration. 20904f461f3SRoger Quadros Valid values are 21004f461f3SRoger Quadros 0 for Non multiplexed mode 21104f461f3SRoger Quadros 1 for address-address-data multiplexing mode and 21204f461f3SRoger Quadros 2 for address-data multiplexing mode. 21304f461f3SRoger Quadros $ref: /schemas/types.yaml#/definitions/uint32 21404f461f3SRoger Quadros enum: [0, 1, 2] 21504f461f3SRoger Quadros 21604f461f3SRoger Quadros gpmc,sync-read: 21704f461f3SRoger Quadros description: | 21804f461f3SRoger Quadros Enables synchronous read. Defaults to asynchronous 21904f461f3SRoger Quadros is this is not set. 22004f461f3SRoger Quadros type: boolean 22104f461f3SRoger Quadros 22204f461f3SRoger Quadros gpmc,sync-write: 22304f461f3SRoger Quadros description: | 22404f461f3SRoger Quadros Enables synchronous writes. Defaults to asynchronous 22504f461f3SRoger Quadros is this is not set. 22604f461f3SRoger Quadros type: boolean 22704f461f3SRoger Quadros 22804f461f3SRoger Quadros gpmc,wait-pin: 22904f461f3SRoger Quadros description: | 23004f461f3SRoger Quadros Wait-pin used by client. Must be less than "gpmc,num-waitpins". 23104f461f3SRoger Quadros $ref: /schemas/types.yaml#/definitions/uint32 23204f461f3SRoger Quadros 2331f1e46b8SBenedikt Niedermayr ti,wait-pin-polarity: 2341f1e46b8SBenedikt Niedermayr description: | 2351f1e46b8SBenedikt Niedermayr Set the desired polarity for the selected wait pin. 2361f1e46b8SBenedikt Niedermayr 0 for active low, 1 for active high. 2371f1e46b8SBenedikt Niedermayr $ref: /schemas/types.yaml#/definitions/uint32 2381f1e46b8SBenedikt Niedermayr enum: [0, 1] 2391f1e46b8SBenedikt Niedermayr 24004f461f3SRoger Quadros gpmc,wait-on-read: 24104f461f3SRoger Quadros description: Enables wait monitoring on reads. 24204f461f3SRoger Quadros type: boolean 24304f461f3SRoger Quadros 24404f461f3SRoger Quadros gpmc,wait-on-write: 24504f461f3SRoger Quadros description: Enables wait monitoring on writes. 24604f461f3SRoger Quadros type: boolean 24704f461f3SRoger Quadros 24804f461f3SRoger Quadrosrequired: 24904f461f3SRoger Quadros - reg 25004f461f3SRoger Quadros 25104f461f3SRoger Quadros# the GPMC child will have its own native properties 25204f461f3SRoger QuadrosadditionalProperties: true 253