1*b2d25905SBiju Das# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b2d25905SBiju Das%YAML 1.2 3*b2d25905SBiju Das--- 4*b2d25905SBiju Das$id: http://devicetree.org/schemas/memory-controllers/renesas,rzg3e-xspi.yaml# 5*b2d25905SBiju Das$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b2d25905SBiju Das 7*b2d25905SBiju Dastitle: Renesas Expanded Serial Peripheral Interface (xSPI) 8*b2d25905SBiju Das 9*b2d25905SBiju Dasmaintainers: 10*b2d25905SBiju Das - Biju Das <biju.das.jz@bp.renesas.com> 11*b2d25905SBiju Das 12*b2d25905SBiju Dasdescription: | 13*b2d25905SBiju Das Renesas xSPI allows a SPI flash connected to the SoC to be accessed via 14*b2d25905SBiju Das the memory-mapping or the manual command mode. 15*b2d25905SBiju Das 16*b2d25905SBiju Das The flash chip itself should be represented by a subnode of the XSPI node. 17*b2d25905SBiju Das The flash interface is selected based on the "compatible" property of this 18*b2d25905SBiju Das subnode: 19*b2d25905SBiju Das - "jedec,spi-nor"; 20*b2d25905SBiju Das 21*b2d25905SBiju DasallOf: 22*b2d25905SBiju Das - $ref: /schemas/spi/spi-controller.yaml# 23*b2d25905SBiju Das 24*b2d25905SBiju Dasproperties: 25*b2d25905SBiju Das compatible: 26*b2d25905SBiju Das const: renesas,r9a09g047-xspi # RZ/G3E 27*b2d25905SBiju Das 28*b2d25905SBiju Das reg: 29*b2d25905SBiju Das items: 30*b2d25905SBiju Das - description: xSPI registers 31*b2d25905SBiju Das - description: direct mapping area 32*b2d25905SBiju Das 33*b2d25905SBiju Das reg-names: 34*b2d25905SBiju Das items: 35*b2d25905SBiju Das - const: regs 36*b2d25905SBiju Das - const: dirmap 37*b2d25905SBiju Das 38*b2d25905SBiju Das interrupts: 39*b2d25905SBiju Das items: 40*b2d25905SBiju Das - description: Interrupt pulse signal by factors excluding errors 41*b2d25905SBiju Das - description: Interrupt pulse signal by error factors 42*b2d25905SBiju Das 43*b2d25905SBiju Das interrupt-names: 44*b2d25905SBiju Das items: 45*b2d25905SBiju Das - const: pulse 46*b2d25905SBiju Das - const: err_pulse 47*b2d25905SBiju Das 48*b2d25905SBiju Das clocks: 49*b2d25905SBiju Das items: 50*b2d25905SBiju Das - description: AHB clock 51*b2d25905SBiju Das - description: AXI clock 52*b2d25905SBiju Das - description: SPI clock 53*b2d25905SBiju Das - description: Double speed SPI clock 54*b2d25905SBiju Das 55*b2d25905SBiju Das clock-names: 56*b2d25905SBiju Das items: 57*b2d25905SBiju Das - const: ahb 58*b2d25905SBiju Das - const: axi 59*b2d25905SBiju Das - const: spi 60*b2d25905SBiju Das - const: spix2 61*b2d25905SBiju Das 62*b2d25905SBiju Das power-domains: 63*b2d25905SBiju Das maxItems: 1 64*b2d25905SBiju Das 65*b2d25905SBiju Das resets: 66*b2d25905SBiju Das items: 67*b2d25905SBiju Das - description: Hardware reset 68*b2d25905SBiju Das - description: AXI reset 69*b2d25905SBiju Das 70*b2d25905SBiju Das reset-names: 71*b2d25905SBiju Das items: 72*b2d25905SBiju Das - const: hresetn 73*b2d25905SBiju Das - const: aresetn 74*b2d25905SBiju Das 75*b2d25905SBiju Das renesas,xspi-cs-addr-sys: 76*b2d25905SBiju Das $ref: /schemas/types.yaml#/definitions/phandle 77*b2d25905SBiju Das description: | 78*b2d25905SBiju Das Phandle to the system controller (sys) that allows to configure 79*b2d25905SBiju Das xSPI CS0 and CS1 addresses. 80*b2d25905SBiju Das 81*b2d25905SBiju DaspatternProperties: 82*b2d25905SBiju Das "flash@[0-9a-f]+$": 83*b2d25905SBiju Das type: object 84*b2d25905SBiju Das additionalProperties: true 85*b2d25905SBiju Das 86*b2d25905SBiju Das properties: 87*b2d25905SBiju Das compatible: 88*b2d25905SBiju Das contains: 89*b2d25905SBiju Das const: jedec,spi-nor 90*b2d25905SBiju Das 91*b2d25905SBiju Dasrequired: 92*b2d25905SBiju Das - compatible 93*b2d25905SBiju Das - reg 94*b2d25905SBiju Das - reg-names 95*b2d25905SBiju Das - interrupts 96*b2d25905SBiju Das - interrupt-names 97*b2d25905SBiju Das - clocks 98*b2d25905SBiju Das - clock-names 99*b2d25905SBiju Das - power-domains 100*b2d25905SBiju Das - resets 101*b2d25905SBiju Das - reset-names 102*b2d25905SBiju Das - '#address-cells' 103*b2d25905SBiju Das - '#size-cells' 104*b2d25905SBiju Das 105*b2d25905SBiju DasunevaluatedProperties: false 106*b2d25905SBiju Das 107*b2d25905SBiju Dasexamples: 108*b2d25905SBiju Das - | 109*b2d25905SBiju Das #include <dt-bindings/interrupt-controller/arm-gic.h> 110*b2d25905SBiju Das #include <dt-bindings/clock/renesas,r9a09g047-cpg.h> 111*b2d25905SBiju Das 112*b2d25905SBiju Das spi@11030000 { 113*b2d25905SBiju Das compatible = "renesas,r9a09g047-xspi"; 114*b2d25905SBiju Das reg = <0x11030000 0x10000>, <0x20000000 0x10000000>; 115*b2d25905SBiju Das reg-names = "regs", "dirmap"; 116*b2d25905SBiju Das interrupts = <GIC_SPI 228 IRQ_TYPE_EDGE_RISING>, 117*b2d25905SBiju Das <GIC_SPI 229 IRQ_TYPE_EDGE_RISING>; 118*b2d25905SBiju Das interrupt-names = "pulse", "err_pulse"; 119*b2d25905SBiju Das clocks = <&cpg CPG_MOD 0x9f>, <&cpg CPG_MOD 0xa0>, 120*b2d25905SBiju Das <&cpg CPG_CORE 9>, <&cpg CPG_MOD 0xa1>; 121*b2d25905SBiju Das clock-names = "ahb", "axi", "spi", "spix2"; 122*b2d25905SBiju Das power-domains = <&cpg>; 123*b2d25905SBiju Das resets = <&cpg 0xa3>, <&cpg 0xa4>; 124*b2d25905SBiju Das reset-names = "hresetn", "aresetn"; 125*b2d25905SBiju Das #address-cells = <1>; 126*b2d25905SBiju Das #size-cells = <0>; 127*b2d25905SBiju Das 128*b2d25905SBiju Das flash@0 { 129*b2d25905SBiju Das compatible = "jedec,spi-nor"; 130*b2d25905SBiju Das reg = <0>; 131*b2d25905SBiju Das spi-max-frequency = <40000000>; 132*b2d25905SBiju Das spi-tx-bus-width = <1>; 133*b2d25905SBiju Das spi-rx-bus-width = <1>; 134*b2d25905SBiju Das }; 135*b2d25905SBiju Das }; 136