xref: /linux/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml (revision 64b14a184e83eb62ea0615e31a409956049d40e7) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas Reduced Pin Count Interface (RPC-IF)
8
9maintainers:
10  - Sergei Shtylyov <sergei.shtylyov@gmail.com>
11
12description: |
13  Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14  be accessed via the external address space read mode or the manual mode.
15
16  The flash chip itself should be represented by a subnode of the RPC-IF node.
17  The flash interface is selected based on the "compatible" property of this
18  subnode:
19  - if it contains "jedec,spi-nor", then SPI is used;
20  - if it contains "cfi-flash", then HyperFlash is used.
21
22allOf:
23  - $ref: "/schemas/spi/spi-controller.yaml#"
24
25properties:
26  compatible:
27    oneOf:
28      - items:
29          - enum:
30              - renesas,r8a774a1-rpc-if       # RZ/G2M
31              - renesas,r8a774b1-rpc-if       # RZ/G2N
32              - renesas,r8a774c0-rpc-if       # RZ/G2E
33              - renesas,r8a774e1-rpc-if       # RZ/G2H
34              - renesas,r8a77970-rpc-if       # R-Car V3M
35              - renesas,r8a77980-rpc-if       # R-Car V3H
36              - renesas,r8a77995-rpc-if       # R-Car D3
37              - renesas,r8a779a0-rpc-if       # R-Car V3U
38          - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
39
40      - items:
41          - enum:
42              - renesas,r9a07g044-rpc-if      # RZ/G2{L,LC}
43          - const: renesas,rzg2l-rpc-if       # RZ/G2L family
44
45  reg:
46    items:
47      - description: RPC-IF registers
48      - description: direct mapping read mode area
49      - description: write buffer area
50
51  reg-names:
52    items:
53      - const: regs
54      - const: dirmap
55      - const: wbuf
56
57  clocks: true
58
59  interrupts:
60    maxItems: 1
61
62  power-domains:
63    maxItems: 1
64
65  resets:
66    maxItems: 1
67
68patternProperties:
69  "flash@[0-9a-f]+$":
70    type: object
71    properties:
72      compatible:
73        contains:
74          enum:
75            - cfi-flash
76            - jedec,spi-nor
77
78required:
79  - compatible
80  - reg
81  - reg-names
82  - clocks
83  - power-domains
84  - resets
85  - '#address-cells'
86  - '#size-cells'
87
88if:
89  properties:
90    compatible:
91      contains:
92        enum:
93          - renesas,rzg2l-rpc-if
94then:
95  properties:
96    clocks:
97      items:
98        - description: SPI Multi IO Register access clock (SPI_CLK2)
99        - description: SPI Multi IO Main clock (SPI_CLK).
100
101else:
102  properties:
103    clocks:
104      maxItems: 1
105
106unevaluatedProperties: false
107
108examples:
109  - |
110    #include <dt-bindings/clock/renesas-cpg-mssr.h>
111    #include <dt-bindings/power/r8a77995-sysc.h>
112
113    spi@ee200000 {
114      compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
115      reg = <0xee200000 0x200>,
116            <0x08000000 0x4000000>,
117            <0xee208000 0x100>;
118      reg-names = "regs", "dirmap", "wbuf";
119      clocks = <&cpg CPG_MOD 917>;
120      power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
121      resets = <&cpg 917>;
122      #address-cells = <1>;
123      #size-cells = <0>;
124
125      flash@0 {
126        compatible = "jedec,spi-nor";
127        reg = <0>;
128        spi-max-frequency = <40000000>;
129        spi-tx-bus-width = <1>;
130        spi-rx-bus-width = <1>;
131      };
132    };
133