1ab1c3620SSergei Shtylyov# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2ab1c3620SSergei Shtylyov%YAML 1.2 3ab1c3620SSergei Shtylyov--- 4ab1c3620SSergei Shtylyov$id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml# 5ab1c3620SSergei Shtylyov$schema: http://devicetree.org/meta-schemas/core.yaml# 6ab1c3620SSergei Shtylyov 7ab1c3620SSergei Shtylyovtitle: Renesas Reduced Pin Count Interface (RPC-IF) 8ab1c3620SSergei Shtylyov 9ab1c3620SSergei Shtylyovmaintainers: 10ab1c3620SSergei Shtylyov - Sergei Shtylyov <sergei.shtylyov@gmail.com> 11ab1c3620SSergei Shtylyov 12ab1c3620SSergei Shtylyovdescription: | 13ab1c3620SSergei Shtylyov Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to 14ab1c3620SSergei Shtylyov be accessed via the external address space read mode or the manual mode. 15ab1c3620SSergei Shtylyov 16ab1c3620SSergei Shtylyov The flash chip itself should be represented by a subnode of the RPC-IF node. 17ab1c3620SSergei Shtylyov The flash interface is selected based on the "compatible" property of this 18ab1c3620SSergei Shtylyov subnode: 19ab1c3620SSergei Shtylyov - if it contains "jedec,spi-nor", then SPI is used; 20ab1c3620SSergei Shtylyov - if it contains "cfi-flash", then HyperFlash is used. 21ab1c3620SSergei Shtylyov 22ab1c3620SSergei ShtylyovallOf: 23ab1c3620SSergei Shtylyov - $ref: "/schemas/spi/spi-controller.yaml#" 24ab1c3620SSergei Shtylyov 25ab1c3620SSergei Shtylyovproperties: 26ab1c3620SSergei Shtylyov compatible: 27c271aa1fSLad Prabhakar oneOf: 28c271aa1fSLad Prabhakar - items: 29ab1c3620SSergei Shtylyov - enum: 308e919918SAdam Ford - renesas,r8a774a1-rpc-if # RZ/G2M 318e919918SAdam Ford - renesas,r8a774b1-rpc-if # RZ/G2N 328e919918SAdam Ford - renesas,r8a774c0-rpc-if # RZ/G2E 338e919918SAdam Ford - renesas,r8a774e1-rpc-if # RZ/G2H 34ab1c3620SSergei Shtylyov - renesas,r8a77970-rpc-if # R-Car V3M 35ab1c3620SSergei Shtylyov - renesas,r8a77980-rpc-if # R-Car V3H 36ab1c3620SSergei Shtylyov - renesas,r8a77995-rpc-if # R-Car D3 37797f0827SWolfram Sang - renesas,r8a779a0-rpc-if # R-Car V3U 38c271aa1fSLad Prabhakar - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device 39c271aa1fSLad Prabhakar 40c271aa1fSLad Prabhakar - items: 41c271aa1fSLad Prabhakar - enum: 42c271aa1fSLad Prabhakar - renesas,r9a07g044-rpc-if # RZ/G2{L,LC} 43c271aa1fSLad Prabhakar - const: renesas,rzg2l-rpc-if # RZ/G2L family 44ab1c3620SSergei Shtylyov 45ab1c3620SSergei Shtylyov reg: 46ab1c3620SSergei Shtylyov items: 47ab1c3620SSergei Shtylyov - description: RPC-IF registers 48ab1c3620SSergei Shtylyov - description: direct mapping read mode area 49ab1c3620SSergei Shtylyov - description: write buffer area 50ab1c3620SSergei Shtylyov 51ab1c3620SSergei Shtylyov reg-names: 52ab1c3620SSergei Shtylyov items: 53ab1c3620SSergei Shtylyov - const: regs 54ab1c3620SSergei Shtylyov - const: dirmap 55ab1c3620SSergei Shtylyov - const: wbuf 56ab1c3620SSergei Shtylyov 57c271aa1fSLad Prabhakar clocks: true 58ab1c3620SSergei Shtylyov 59*4b5a231fSLad Prabhakar interrupts: 60*4b5a231fSLad Prabhakar maxItems: 1 61*4b5a231fSLad Prabhakar 62ab1c3620SSergei Shtylyov power-domains: 63ab1c3620SSergei Shtylyov maxItems: 1 64ab1c3620SSergei Shtylyov 65ab1c3620SSergei Shtylyov resets: 66ab1c3620SSergei Shtylyov maxItems: 1 67ab1c3620SSergei Shtylyov 68ab1c3620SSergei ShtylyovpatternProperties: 69ab1c3620SSergei Shtylyov "flash@[0-9a-f]+$": 70ab1c3620SSergei Shtylyov type: object 71ab1c3620SSergei Shtylyov properties: 72ab1c3620SSergei Shtylyov compatible: 73dbe60e5dSGeert Uytterhoeven contains: 74ab1c3620SSergei Shtylyov enum: 75ab1c3620SSergei Shtylyov - cfi-flash 76ab1c3620SSergei Shtylyov - jedec,spi-nor 77ab1c3620SSergei Shtylyov 78dbe60e5dSGeert Uytterhoevenrequired: 79dbe60e5dSGeert Uytterhoeven - compatible 80dbe60e5dSGeert Uytterhoeven - reg 81dbe60e5dSGeert Uytterhoeven - reg-names 82dbe60e5dSGeert Uytterhoeven - clocks 83dbe60e5dSGeert Uytterhoeven - power-domains 84dbe60e5dSGeert Uytterhoeven - resets 85dbe60e5dSGeert Uytterhoeven - '#address-cells' 86dbe60e5dSGeert Uytterhoeven - '#size-cells' 87dbe60e5dSGeert Uytterhoeven 88c271aa1fSLad Prabhakarif: 89c271aa1fSLad Prabhakar properties: 90c271aa1fSLad Prabhakar compatible: 91c271aa1fSLad Prabhakar contains: 92c271aa1fSLad Prabhakar enum: 93c271aa1fSLad Prabhakar - renesas,rzg2l-rpc-if 94c271aa1fSLad Prabhakarthen: 95c271aa1fSLad Prabhakar properties: 96c271aa1fSLad Prabhakar clocks: 97c271aa1fSLad Prabhakar items: 98c271aa1fSLad Prabhakar - description: SPI Multi IO Register access clock (SPI_CLK2) 99c271aa1fSLad Prabhakar - description: SPI Multi IO Main clock (SPI_CLK). 100c271aa1fSLad Prabhakar 101c271aa1fSLad Prabhakarelse: 102c271aa1fSLad Prabhakar properties: 103c271aa1fSLad Prabhakar clocks: 104c271aa1fSLad Prabhakar maxItems: 1 105c271aa1fSLad Prabhakar 106c271aa1fSLad PrabhakarunevaluatedProperties: false 107c271aa1fSLad Prabhakar 108ab1c3620SSergei Shtylyovexamples: 109ab1c3620SSergei Shtylyov - | 110ab1c3620SSergei Shtylyov #include <dt-bindings/clock/renesas-cpg-mssr.h> 111ab1c3620SSergei Shtylyov #include <dt-bindings/power/r8a77995-sysc.h> 112ab1c3620SSergei Shtylyov 113ab1c3620SSergei Shtylyov spi@ee200000 { 114ab1c3620SSergei Shtylyov compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if"; 115ab1c3620SSergei Shtylyov reg = <0xee200000 0x200>, 116ab1c3620SSergei Shtylyov <0x08000000 0x4000000>, 117ab1c3620SSergei Shtylyov <0xee208000 0x100>; 118ab1c3620SSergei Shtylyov reg-names = "regs", "dirmap", "wbuf"; 119ab1c3620SSergei Shtylyov clocks = <&cpg CPG_MOD 917>; 120ab1c3620SSergei Shtylyov power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; 121ab1c3620SSergei Shtylyov resets = <&cpg 917>; 122ab1c3620SSergei Shtylyov #address-cells = <1>; 123ab1c3620SSergei Shtylyov #size-cells = <0>; 124ab1c3620SSergei Shtylyov 125ab1c3620SSergei Shtylyov flash@0 { 126ab1c3620SSergei Shtylyov compatible = "jedec,spi-nor"; 127ab1c3620SSergei Shtylyov reg = <0>; 128ab1c3620SSergei Shtylyov spi-max-frequency = <40000000>; 129ab1c3620SSergei Shtylyov spi-tx-bus-width = <1>; 130ab1c3620SSergei Shtylyov spi-rx-bus-width = <1>; 131ab1c3620SSergei Shtylyov }; 132ab1c3620SSergei Shtylyov }; 133