xref: /linux/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra210-emc.yaml (revision 30bbcb44707a97fcb62246bebc8b413b5ab293f8) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra210 SoC External Memory Controller
8
9maintainers:
10  - Thierry Reding <thierry.reding@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12
13description: |
14  The EMC interfaces with the off-chip SDRAM to service the request stream
15  sent from the memory controller.
16
17properties:
18  compatible:
19    const: nvidia,tegra210-emc
20
21  reg:
22    maxItems: 3
23
24  clocks:
25    items:
26      - description: external memory clock
27
28  clock-names:
29    items:
30      - const: emc
31
32  interrupts:
33    items:
34      - description: EMC general interrupt
35
36  "#interconnect-cells":
37    const: 0
38
39  memory-region:
40    maxItems: 1
41    description:
42      phandle to a reserved memory region describing the table of EMC
43      frequencies trained by the firmware
44
45  nvidia,memory-controller:
46    $ref: /schemas/types.yaml#/definitions/phandle
47    description:
48      phandle of the memory controller node
49
50  operating-points-v2:
51    description:
52      Should contain freqs and voltages and opp-supported-hw property, which
53      is a bitfield indicating SoC speedo ID mask.
54
55required:
56  - compatible
57  - reg
58  - clocks
59  - clock-names
60  - nvidia,memory-controller
61
62additionalProperties: false
63
64examples:
65  - |
66    #include <dt-bindings/clock/tegra210-car.h>
67    #include <dt-bindings/interrupt-controller/arm-gic.h>
68
69    reserved-memory {
70        #address-cells = <1>;
71        #size-cells = <1>;
72        ranges;
73
74        emc_table: emc-table@83400000 {
75            compatible = "nvidia,tegra210-emc-table";
76            reg = <0x83400000 0x10000>;
77        };
78    };
79
80    external-memory-controller@7001b000 {
81        compatible = "nvidia,tegra210-emc";
82        reg = <0x7001b000 0x1000>,
83              <0x7001e000 0x1000>,
84              <0x7001f000 0x1000>;
85        clocks = <&tegra_car TEGRA210_CLK_EMC>;
86        clock-names = "emc";
87        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
88        memory-region = <&emc_table>;
89        nvidia,memory-controller = <&mc>;
90        operating-points-v2 = <&dvfs_opp_table>;
91
92        #interconnect-cells = <0>;
93    };
94