1*180a276cSKrzysztof Kozlowski# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*180a276cSKrzysztof Kozlowski%YAML 1.2 3*180a276cSKrzysztof Kozlowski--- 4*180a276cSKrzysztof Kozlowski$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr3-timings.yaml# 5*180a276cSKrzysztof Kozlowski$schema: http://devicetree.org/meta-schemas/core.yaml# 6*180a276cSKrzysztof Kozlowski 7*180a276cSKrzysztof Kozlowskititle: LPDDR3 SDRAM AC timing parameters for a given speed-bin 8*180a276cSKrzysztof Kozlowski 9*180a276cSKrzysztof Kozlowskimaintainers: 10*180a276cSKrzysztof Kozlowski - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> 11*180a276cSKrzysztof Kozlowski 12*180a276cSKrzysztof Kozlowskiproperties: 13*180a276cSKrzysztof Kozlowski compatible: 14*180a276cSKrzysztof Kozlowski const: jedec,lpddr3-timings 15*180a276cSKrzysztof Kozlowski 16*180a276cSKrzysztof Kozlowski reg: 17*180a276cSKrzysztof Kozlowski maxItems: 1 18*180a276cSKrzysztof Kozlowski description: | 19*180a276cSKrzysztof Kozlowski Maximum DDR clock frequency for the speed-bin, in Hz. 20*180a276cSKrzysztof Kozlowski 21*180a276cSKrzysztof Kozlowski min-freq: 22*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 23*180a276cSKrzysztof Kozlowski description: | 24*180a276cSKrzysztof Kozlowski Minimum DDR clock frequency for the speed-bin, in Hz. 25*180a276cSKrzysztof Kozlowski 26*180a276cSKrzysztof Kozlowski tCKE: 27*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 28*180a276cSKrzysztof Kozlowski description: | 29*180a276cSKrzysztof Kozlowski CKE minimum pulse width (HIGH and LOW pulse width) in pico seconds. 30*180a276cSKrzysztof Kozlowski 31*180a276cSKrzysztof Kozlowski tCKESR: 32*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 33*180a276cSKrzysztof Kozlowski description: | 34*180a276cSKrzysztof Kozlowski CKE minimum pulse width during SELF REFRESH (low pulse width during 35*180a276cSKrzysztof Kozlowski SELF REFRESH) in pico seconds. 36*180a276cSKrzysztof Kozlowski 37*180a276cSKrzysztof Kozlowski tFAW: 38*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 39*180a276cSKrzysztof Kozlowski description: | 40*180a276cSKrzysztof Kozlowski Four-bank activate window in pico seconds. 41*180a276cSKrzysztof Kozlowski 42*180a276cSKrzysztof Kozlowski tMRD: 43*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 44*180a276cSKrzysztof Kozlowski description: | 45*180a276cSKrzysztof Kozlowski Mode register set command delay in pico seconds. 46*180a276cSKrzysztof Kozlowski 47*180a276cSKrzysztof Kozlowski tR2R-C2C: 48*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 49*180a276cSKrzysztof Kozlowski description: | 50*180a276cSKrzysztof Kozlowski Additional READ-to-READ delay in chip-to-chip cases in pico seconds. 51*180a276cSKrzysztof Kozlowski 52*180a276cSKrzysztof Kozlowski tRAS: 53*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 54*180a276cSKrzysztof Kozlowski description: | 55*180a276cSKrzysztof Kozlowski Row active time in pico seconds. 56*180a276cSKrzysztof Kozlowski 57*180a276cSKrzysztof Kozlowski tRC: 58*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 59*180a276cSKrzysztof Kozlowski description: | 60*180a276cSKrzysztof Kozlowski ACTIVATE-to-ACTIVATE command period in pico seconds. 61*180a276cSKrzysztof Kozlowski 62*180a276cSKrzysztof Kozlowski tRCD: 63*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 64*180a276cSKrzysztof Kozlowski description: | 65*180a276cSKrzysztof Kozlowski RAS-to-CAS delay in pico seconds. 66*180a276cSKrzysztof Kozlowski 67*180a276cSKrzysztof Kozlowski tRFC: 68*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 69*180a276cSKrzysztof Kozlowski description: | 70*180a276cSKrzysztof Kozlowski Refresh Cycle time in pico seconds. 71*180a276cSKrzysztof Kozlowski 72*180a276cSKrzysztof Kozlowski tRPab: 73*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 74*180a276cSKrzysztof Kozlowski description: | 75*180a276cSKrzysztof Kozlowski Row precharge time (all banks) in pico seconds. 76*180a276cSKrzysztof Kozlowski 77*180a276cSKrzysztof Kozlowski tRPpb: 78*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 79*180a276cSKrzysztof Kozlowski description: | 80*180a276cSKrzysztof Kozlowski Row precharge time (single banks) in pico seconds. 81*180a276cSKrzysztof Kozlowski 82*180a276cSKrzysztof Kozlowski tRRD: 83*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 84*180a276cSKrzysztof Kozlowski description: | 85*180a276cSKrzysztof Kozlowski Active bank A to active bank B in pico seconds. 86*180a276cSKrzysztof Kozlowski 87*180a276cSKrzysztof Kozlowski tRTP: 88*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 89*180a276cSKrzysztof Kozlowski description: | 90*180a276cSKrzysztof Kozlowski Internal READ to PRECHARGE command delay in pico seconds. 91*180a276cSKrzysztof Kozlowski 92*180a276cSKrzysztof Kozlowski tW2W-C2C: 93*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 94*180a276cSKrzysztof Kozlowski description: | 95*180a276cSKrzysztof Kozlowski Additional WRITE-to-WRITE delay in chip-to-chip cases in pico seconds. 96*180a276cSKrzysztof Kozlowski 97*180a276cSKrzysztof Kozlowski tWR: 98*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 99*180a276cSKrzysztof Kozlowski description: | 100*180a276cSKrzysztof Kozlowski WRITE recovery time in pico seconds. 101*180a276cSKrzysztof Kozlowski 102*180a276cSKrzysztof Kozlowski tWTR: 103*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 104*180a276cSKrzysztof Kozlowski description: | 105*180a276cSKrzysztof Kozlowski Internal WRITE-to-READ command delay in pico seconds. 106*180a276cSKrzysztof Kozlowski 107*180a276cSKrzysztof Kozlowski tXP: 108*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 109*180a276cSKrzysztof Kozlowski description: | 110*180a276cSKrzysztof Kozlowski Exit power-down to next valid command delay in pico seconds. 111*180a276cSKrzysztof Kozlowski 112*180a276cSKrzysztof Kozlowski tXSR: 113*180a276cSKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 114*180a276cSKrzysztof Kozlowski description: | 115*180a276cSKrzysztof Kozlowski SELF REFRESH exit to next valid command delay in pico seconds. 116*180a276cSKrzysztof Kozlowski 117*180a276cSKrzysztof Kozlowskirequired: 118*180a276cSKrzysztof Kozlowski - compatible 119*180a276cSKrzysztof Kozlowski - min-freq 120*180a276cSKrzysztof Kozlowski - reg 121*180a276cSKrzysztof Kozlowski 122*180a276cSKrzysztof KozlowskiadditionalProperties: false 123*180a276cSKrzysztof Kozlowski 124*180a276cSKrzysztof Kozlowskiexamples: 125*180a276cSKrzysztof Kozlowski - | 126*180a276cSKrzysztof Kozlowski lpddr3 { 127*180a276cSKrzysztof Kozlowski #address-cells = <1>; 128*180a276cSKrzysztof Kozlowski #size-cells = <0>; 129*180a276cSKrzysztof Kozlowski 130*180a276cSKrzysztof Kozlowski timings@800000000 { 131*180a276cSKrzysztof Kozlowski compatible = "jedec,lpddr3-timings"; 132*180a276cSKrzysztof Kozlowski reg = <800000000>; 133*180a276cSKrzysztof Kozlowski min-freq = <100000000>; 134*180a276cSKrzysztof Kozlowski tCKE = <3750>; 135*180a276cSKrzysztof Kozlowski tCKESR = <3750>; 136*180a276cSKrzysztof Kozlowski tFAW = <25000>; 137*180a276cSKrzysztof Kozlowski tMRD = <7000>; 138*180a276cSKrzysztof Kozlowski tR2R-C2C = <0>; 139*180a276cSKrzysztof Kozlowski tRAS = <23000>; 140*180a276cSKrzysztof Kozlowski tRC = <33750>; 141*180a276cSKrzysztof Kozlowski tRCD = <10000>; 142*180a276cSKrzysztof Kozlowski tRFC = <65000>; 143*180a276cSKrzysztof Kozlowski tRPab = <12000>; 144*180a276cSKrzysztof Kozlowski tRPpb = <12000>; 145*180a276cSKrzysztof Kozlowski tRRD = <6000>; 146*180a276cSKrzysztof Kozlowski tRTP = <3750>; 147*180a276cSKrzysztof Kozlowski tW2W-C2C = <0>; 148*180a276cSKrzysztof Kozlowski tWR = <7500>; 149*180a276cSKrzysztof Kozlowski tWTR = <3750>; 150*180a276cSKrzysztof Kozlowski tXP = <3750>; 151*180a276cSKrzysztof Kozlowski tXSR = <70000>; 152*180a276cSKrzysztof Kozlowski }; 153*180a276cSKrzysztof Kozlowski }; 154