1b7178cd5SJulius Werner# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b7178cd5SJulius Werner%YAML 1.2 3b7178cd5SJulius Werner--- 4b7178cd5SJulius Werner$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml# 5b7178cd5SJulius Werner$schema: http://devicetree.org/meta-schemas/core.yaml# 6b7178cd5SJulius Werner 7b7178cd5SJulius Wernertitle: Common properties for LPDDR types 8b7178cd5SJulius Werner 9b7178cd5SJulius Wernerdescription: 10b7178cd5SJulius Werner Different LPDDR types generally use the same properties and only differ in the 11b7178cd5SJulius Werner range of legal values for each. This file defines the common parts that can be 12b7178cd5SJulius Werner reused for each type. 13b7178cd5SJulius Werner 14b7178cd5SJulius Wernermaintainers: 15b7178cd5SJulius Werner - Krzysztof Kozlowski <krzk@kernel.org> 16b7178cd5SJulius Werner 17b7178cd5SJulius Wernerproperties: 18686fe63bSJulius Werner compatible: 19686fe63bSJulius Werner description: 20686fe63bSJulius Werner Compatible strings can be either explicit vendor names and part numbers 21686fe63bSJulius Werner (e.g. elpida,ECB240ABACN), or generated strings of the form 22686fe63bSJulius Werner lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID 23686fe63bSJulius Werner (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are 24686fe63bSJulius Werner formatted in lower case hexadecimal representation with leading zeroes. 25686fe63bSJulius Werner The latter form can be useful when LPDDR nodes are created at runtime by 26686fe63bSJulius Werner boot firmware that doesn't have access to static part number information. 27686fe63bSJulius Werner 28b7178cd5SJulius Werner revision-id: 29b7178cd5SJulius Werner $ref: /schemas/types.yaml#/definitions/uint32-array 30b7178cd5SJulius Werner description: 31b7178cd5SJulius Werner Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>). 32b7178cd5SJulius Werner maxItems: 2 33b7178cd5SJulius Werner items: 34b7178cd5SJulius Werner minimum: 0 35b7178cd5SJulius Werner maximum: 255 36b7178cd5SJulius Werner 37b7178cd5SJulius Werner density: 38b7178cd5SJulius Werner $ref: /schemas/types.yaml#/definitions/uint32 39b7178cd5SJulius Werner description: 40b7178cd5SJulius Werner Density in megabits of SDRAM chip. Decoded from Mode Register 8. 41b7178cd5SJulius Werner enum: 42b7178cd5SJulius Werner - 64 43b7178cd5SJulius Werner - 128 44b7178cd5SJulius Werner - 256 45b7178cd5SJulius Werner - 512 46b7178cd5SJulius Werner - 1024 47b7178cd5SJulius Werner - 2048 48*a500528fSJulius Werner - 3072 49b7178cd5SJulius Werner - 4096 50*a500528fSJulius Werner - 6144 51b7178cd5SJulius Werner - 8192 52*a500528fSJulius Werner - 12288 53b7178cd5SJulius Werner - 16384 54*a500528fSJulius Werner - 24576 55b7178cd5SJulius Werner - 32768 56b7178cd5SJulius Werner 57b7178cd5SJulius Werner io-width: 58b7178cd5SJulius Werner $ref: /schemas/types.yaml#/definitions/uint32 59b7178cd5SJulius Werner description: 60b7178cd5SJulius Werner IO bus width in bits of SDRAM chip. Decoded from Mode Register 8. 61b7178cd5SJulius Werner enum: 62b7178cd5SJulius Werner - 8 63b7178cd5SJulius Werner - 16 64b7178cd5SJulius Werner - 32 65b7178cd5SJulius Werner 66b7178cd5SJulius WerneradditionalProperties: true 67