1*f5502cd2SJack Zhu# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*f5502cd2SJack Zhu%YAML 1.2 3*f5502cd2SJack Zhu--- 4*f5502cd2SJack Zhu$id: http://devicetree.org/schemas/media/starfive,jh7110-camss.yaml# 5*f5502cd2SJack Zhu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*f5502cd2SJack Zhu 7*f5502cd2SJack Zhutitle: Starfive SoC CAMSS ISP 8*f5502cd2SJack Zhu 9*f5502cd2SJack Zhumaintainers: 10*f5502cd2SJack Zhu - Jack Zhu <jack.zhu@starfivetech.com> 11*f5502cd2SJack Zhu - Changhuang Liang <changhuang.liang@starfivetech.com> 12*f5502cd2SJack Zhu 13*f5502cd2SJack Zhudescription: 14*f5502cd2SJack Zhu The Starfive CAMSS ISP is a Camera interface for Starfive JH7110 SoC. It 15*f5502cd2SJack Zhu consists of a VIN controller (Video In Controller, a top-level control unit) 16*f5502cd2SJack Zhu and an ISP. 17*f5502cd2SJack Zhu 18*f5502cd2SJack Zhuproperties: 19*f5502cd2SJack Zhu compatible: 20*f5502cd2SJack Zhu const: starfive,jh7110-camss 21*f5502cd2SJack Zhu 22*f5502cd2SJack Zhu reg: 23*f5502cd2SJack Zhu maxItems: 2 24*f5502cd2SJack Zhu 25*f5502cd2SJack Zhu reg-names: 26*f5502cd2SJack Zhu items: 27*f5502cd2SJack Zhu - const: syscon 28*f5502cd2SJack Zhu - const: isp 29*f5502cd2SJack Zhu 30*f5502cd2SJack Zhu clocks: 31*f5502cd2SJack Zhu maxItems: 7 32*f5502cd2SJack Zhu 33*f5502cd2SJack Zhu clock-names: 34*f5502cd2SJack Zhu items: 35*f5502cd2SJack Zhu - const: apb_func 36*f5502cd2SJack Zhu - const: wrapper_clk_c 37*f5502cd2SJack Zhu - const: dvp_inv 38*f5502cd2SJack Zhu - const: axiwr 39*f5502cd2SJack Zhu - const: mipi_rx0_pxl 40*f5502cd2SJack Zhu - const: ispcore_2x 41*f5502cd2SJack Zhu - const: isp_axi 42*f5502cd2SJack Zhu 43*f5502cd2SJack Zhu resets: 44*f5502cd2SJack Zhu maxItems: 6 45*f5502cd2SJack Zhu 46*f5502cd2SJack Zhu reset-names: 47*f5502cd2SJack Zhu items: 48*f5502cd2SJack Zhu - const: wrapper_p 49*f5502cd2SJack Zhu - const: wrapper_c 50*f5502cd2SJack Zhu - const: axird 51*f5502cd2SJack Zhu - const: axiwr 52*f5502cd2SJack Zhu - const: isp_top_n 53*f5502cd2SJack Zhu - const: isp_top_axi 54*f5502cd2SJack Zhu 55*f5502cd2SJack Zhu power-domains: 56*f5502cd2SJack Zhu items: 57*f5502cd2SJack Zhu - description: JH7110 ISP Power Domain Switch Controller. 58*f5502cd2SJack Zhu 59*f5502cd2SJack Zhu interrupts: 60*f5502cd2SJack Zhu maxItems: 4 61*f5502cd2SJack Zhu 62*f5502cd2SJack Zhu ports: 63*f5502cd2SJack Zhu $ref: /schemas/graph.yaml#/properties/ports 64*f5502cd2SJack Zhu 65*f5502cd2SJack Zhu properties: 66*f5502cd2SJack Zhu port@0: 67*f5502cd2SJack Zhu $ref: /schemas/graph.yaml#/$defs/port-base 68*f5502cd2SJack Zhu unevaluatedProperties: false 69*f5502cd2SJack Zhu description: Input port for receiving DVP data. 70*f5502cd2SJack Zhu 71*f5502cd2SJack Zhu properties: 72*f5502cd2SJack Zhu endpoint: 73*f5502cd2SJack Zhu $ref: video-interfaces.yaml# 74*f5502cd2SJack Zhu unevaluatedProperties: false 75*f5502cd2SJack Zhu 76*f5502cd2SJack Zhu properties: 77*f5502cd2SJack Zhu bus-type: 78*f5502cd2SJack Zhu enum: [5, 6] 79*f5502cd2SJack Zhu 80*f5502cd2SJack Zhu bus-width: 81*f5502cd2SJack Zhu enum: [8, 10, 12] 82*f5502cd2SJack Zhu 83*f5502cd2SJack Zhu data-shift: 84*f5502cd2SJack Zhu enum: [0, 2] 85*f5502cd2SJack Zhu default: 0 86*f5502cd2SJack Zhu 87*f5502cd2SJack Zhu hsync-active: 88*f5502cd2SJack Zhu enum: [0, 1] 89*f5502cd2SJack Zhu default: 1 90*f5502cd2SJack Zhu 91*f5502cd2SJack Zhu vsync-active: 92*f5502cd2SJack Zhu enum: [0, 1] 93*f5502cd2SJack Zhu default: 1 94*f5502cd2SJack Zhu 95*f5502cd2SJack Zhu required: 96*f5502cd2SJack Zhu - bus-type 97*f5502cd2SJack Zhu - bus-width 98*f5502cd2SJack Zhu 99*f5502cd2SJack Zhu port@1: 100*f5502cd2SJack Zhu $ref: /schemas/graph.yaml#/properties/port 101*f5502cd2SJack Zhu description: Input port for receiving CSI data. 102*f5502cd2SJack Zhu 103*f5502cd2SJack Zhu required: 104*f5502cd2SJack Zhu - port@0 105*f5502cd2SJack Zhu - port@1 106*f5502cd2SJack Zhu 107*f5502cd2SJack Zhurequired: 108*f5502cd2SJack Zhu - compatible 109*f5502cd2SJack Zhu - reg 110*f5502cd2SJack Zhu - reg-names 111*f5502cd2SJack Zhu - clocks 112*f5502cd2SJack Zhu - clock-names 113*f5502cd2SJack Zhu - resets 114*f5502cd2SJack Zhu - reset-names 115*f5502cd2SJack Zhu - power-domains 116*f5502cd2SJack Zhu - interrupts 117*f5502cd2SJack Zhu - ports 118*f5502cd2SJack Zhu 119*f5502cd2SJack ZhuadditionalProperties: false 120*f5502cd2SJack Zhu 121*f5502cd2SJack Zhuexamples: 122*f5502cd2SJack Zhu - | 123*f5502cd2SJack Zhu isp@19840000 { 124*f5502cd2SJack Zhu compatible = "starfive,jh7110-camss"; 125*f5502cd2SJack Zhu reg = <0x19840000 0x10000>, 126*f5502cd2SJack Zhu <0x19870000 0x30000>; 127*f5502cd2SJack Zhu reg-names = "syscon", "isp"; 128*f5502cd2SJack Zhu clocks = <&ispcrg 0>, 129*f5502cd2SJack Zhu <&ispcrg 13>, 130*f5502cd2SJack Zhu <&ispcrg 2>, 131*f5502cd2SJack Zhu <&ispcrg 12>, 132*f5502cd2SJack Zhu <&ispcrg 1>, 133*f5502cd2SJack Zhu <&syscrg 51>, 134*f5502cd2SJack Zhu <&syscrg 52>; 135*f5502cd2SJack Zhu clock-names = "apb_func", 136*f5502cd2SJack Zhu "wrapper_clk_c", 137*f5502cd2SJack Zhu "dvp_inv", 138*f5502cd2SJack Zhu "axiwr", 139*f5502cd2SJack Zhu "mipi_rx0_pxl", 140*f5502cd2SJack Zhu "ispcore_2x", 141*f5502cd2SJack Zhu "isp_axi"; 142*f5502cd2SJack Zhu resets = <&ispcrg 0>, 143*f5502cd2SJack Zhu <&ispcrg 1>, 144*f5502cd2SJack Zhu <&ispcrg 10>, 145*f5502cd2SJack Zhu <&ispcrg 11>, 146*f5502cd2SJack Zhu <&syscrg 41>, 147*f5502cd2SJack Zhu <&syscrg 42>; 148*f5502cd2SJack Zhu reset-names = "wrapper_p", 149*f5502cd2SJack Zhu "wrapper_c", 150*f5502cd2SJack Zhu "axird", 151*f5502cd2SJack Zhu "axiwr", 152*f5502cd2SJack Zhu "isp_top_n", 153*f5502cd2SJack Zhu "isp_top_axi"; 154*f5502cd2SJack Zhu power-domains = <&pwrc 5>; 155*f5502cd2SJack Zhu interrupts = <92>, <87>, <88>, <90>; 156*f5502cd2SJack Zhu 157*f5502cd2SJack Zhu ports { 158*f5502cd2SJack Zhu #address-cells = <1>; 159*f5502cd2SJack Zhu #size-cells = <0>; 160*f5502cd2SJack Zhu port@0 { 161*f5502cd2SJack Zhu reg = <0>; 162*f5502cd2SJack Zhu vin_from_sc2235: endpoint { 163*f5502cd2SJack Zhu remote-endpoint = <&sc2235_to_vin>; 164*f5502cd2SJack Zhu bus-type = <5>; 165*f5502cd2SJack Zhu bus-width = <8>; 166*f5502cd2SJack Zhu data-shift = <2>; 167*f5502cd2SJack Zhu hsync-active = <1>; 168*f5502cd2SJack Zhu vsync-active = <0>; 169*f5502cd2SJack Zhu pclk-sample = <1>; 170*f5502cd2SJack Zhu }; 171*f5502cd2SJack Zhu }; 172*f5502cd2SJack Zhu 173*f5502cd2SJack Zhu port@1 { 174*f5502cd2SJack Zhu reg = <1>; 175*f5502cd2SJack Zhu vin_from_csi2rx: endpoint { 176*f5502cd2SJack Zhu remote-endpoint = <&csi2rx_to_vin>; 177*f5502cd2SJack Zhu }; 178*f5502cd2SJack Zhu }; 179*f5502cd2SJack Zhu }; 180*f5502cd2SJack Zhu }; 181