168dda3e0SDillon Min# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 268dda3e0SDillon Min%YAML 1.2 368dda3e0SDillon Min--- 468dda3e0SDillon Min$id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml# 568dda3e0SDillon Min$schema: http://devicetree.org/meta-schemas/core.yaml# 668dda3e0SDillon Min 7*84e85359SKrzysztof Kozlowskititle: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D 868dda3e0SDillon Min 968dda3e0SDillon Mindescription: 1068dda3e0SDillon Min Chrom-ART Accelerator(DMA2D), graphical hardware accelerator 1168dda3e0SDillon Min enabling enhanced graphical user interface with minimum CPU load 1268dda3e0SDillon Min 1368dda3e0SDillon Min It can perform the following operations. 1468dda3e0SDillon Min 1568dda3e0SDillon Min - Filling a part or the whole of a destination image with a specific color. 1668dda3e0SDillon Min - Copying a part or the whole of a source image into a part or the whole of 1768dda3e0SDillon Min a destination image. 1868dda3e0SDillon Min - Copying a part or the whole of a source image into a part or the whole of 1968dda3e0SDillon Min a destination image with a pixel format conversion. 2068dda3e0SDillon Min - Blending a part and/or two complete source images with different pixel 2168dda3e0SDillon Min format and copy the result into a part or the whole of a destination image 2268dda3e0SDillon Min with a different color format. (TODO) 2368dda3e0SDillon Min 2468dda3e0SDillon Min 2568dda3e0SDillon Minmaintainers: 2668dda3e0SDillon Min - Dillon Min <dillon.minfei@gmail.com> 2768dda3e0SDillon Min 2868dda3e0SDillon Minproperties: 2968dda3e0SDillon Min compatible: 3068dda3e0SDillon Min const: st,stm32-dma2d 3168dda3e0SDillon Min 3268dda3e0SDillon Min reg: 3368dda3e0SDillon Min maxItems: 1 3468dda3e0SDillon Min 3568dda3e0SDillon Min interrupts: 3668dda3e0SDillon Min maxItems: 1 3768dda3e0SDillon Min 3868dda3e0SDillon Min clocks: 3968dda3e0SDillon Min maxItems: 1 4068dda3e0SDillon Min 4168dda3e0SDillon Min clock-names: 4268dda3e0SDillon Min items: 4368dda3e0SDillon Min - const: dma2d 4468dda3e0SDillon Min 4568dda3e0SDillon Min resets: 4668dda3e0SDillon Min maxItems: 1 4768dda3e0SDillon Min 4868dda3e0SDillon Minrequired: 4968dda3e0SDillon Min - compatible 5068dda3e0SDillon Min - reg 5168dda3e0SDillon Min - interrupts 5268dda3e0SDillon Min - clocks 5368dda3e0SDillon Min - clock-names 5468dda3e0SDillon Min - resets 5568dda3e0SDillon Min 5668dda3e0SDillon MinadditionalProperties: false 5768dda3e0SDillon Min 5868dda3e0SDillon Minexamples: 5968dda3e0SDillon Min - | 6068dda3e0SDillon Min #include <dt-bindings/clock/stm32fx-clock.h> 6168dda3e0SDillon Min #include <dt-bindings/mfd/stm32f4-rcc.h> 6268dda3e0SDillon Min dma2d: dma2d@4002b000 { 6368dda3e0SDillon Min compatible = "st,stm32-dma2d"; 6468dda3e0SDillon Min reg = <0x4002b000 0xc00>; 6568dda3e0SDillon Min interrupts = <90>; 6668dda3e0SDillon Min resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>; 6768dda3e0SDillon Min clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>; 6868dda3e0SDillon Min clock-names = "dma2d"; 6968dda3e0SDillon Min }; 7068dda3e0SDillon Min 7168dda3e0SDillon Min... 72