1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/rockchip,vdec.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip Video Decoder (VDec) 8 9maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12description: |- 13 Rockchip SoCs have variants of the same stateless Video Decoder that can 14 decodes H.264, HEVC, VP9 and AV1 streams, depending on the variant. 15 16properties: 17 compatible: 18 oneOf: 19 - const: rockchip,rk3288-vdec 20 - const: rockchip,rk3399-vdec 21 - const: rockchip,rk3576-vdec 22 - const: rockchip,rk3588-vdec 23 - items: 24 - enum: 25 - rockchip,rk3228-vdec 26 - rockchip,rk3328-vdec 27 - const: rockchip,rk3399-vdec 28 29 reg: 30 minItems: 1 31 maxItems: 3 32 33 reg-names: 34 oneOf: 35 - items: 36 - const: link 37 - const: function 38 - const: cache 39 - items: 40 - const: function 41 - const: link 42 - const: cache 43 deprecated: true 44 description: Use link,function,cache block order instead. 45 46 interrupts: 47 maxItems: 1 48 49 clocks: 50 minItems: 4 51 items: 52 - description: The Video Decoder AXI interface clock 53 - description: The Video Decoder AHB interface clock 54 - description: The Video Decoded CABAC clock 55 - description: The Video Decoder core clock 56 - description: The Video decoder HEVC CABAC clock 57 58 clock-names: 59 minItems: 4 60 items: 61 - const: axi 62 - const: ahb 63 - const: cabac 64 - const: core 65 - const: hevc_cabac 66 67 assigned-clocks: true 68 69 assigned-clock-rates: true 70 71 resets: 72 items: 73 - description: The Video Decoder AXI interface reset 74 - description: The Video Decoder AHB interface reset 75 - description: The Video Decoded CABAC reset 76 - description: The Video Decoder core reset 77 - description: The Video decoder HEVC CABAC reset 78 79 reset-names: 80 items: 81 - const: axi 82 - const: ahb 83 - const: cabac 84 - const: core 85 - const: hevc_cabac 86 87 power-domains: 88 maxItems: 1 89 90 iommus: 91 maxItems: 1 92 93 sram: 94 $ref: /schemas/types.yaml#/definitions/phandle 95 description: | 96 phandle to a reserved on-chip SRAM regions. 97 Some SoCs, like rk3588 provide on-chip SRAM to store temporary 98 buffers during decoding. 99 100required: 101 - compatible 102 - reg 103 - interrupts 104 - clocks 105 - clock-names 106 - power-domains 107 108allOf: 109 - if: 110 properties: 111 compatible: 112 contains: 113 enum: 114 - rockchip,rk3576-vdec 115 - rockchip,rk3588-vdec 116 then: 117 properties: 118 reg: 119 minItems: 3 120 reg-names: 121 minItems: 3 122 clocks: 123 minItems: 5 124 clock-names: 125 minItems: 5 126 resets: 127 minItems: 5 128 reset-names: 129 minItems: 5 130 required: 131 - reg-names 132 else: 133 properties: 134 reg: 135 maxItems: 1 136 reg-names: false 137 clocks: 138 maxItems: 4 139 clock-names: 140 maxItems: 4 141 resets: false 142 reset-names: false 143 sram: false 144 145additionalProperties: false 146 147examples: 148 - | 149 #include <dt-bindings/interrupt-controller/arm-gic.h> 150 #include <dt-bindings/clock/rk3399-cru.h> 151 #include <dt-bindings/power/rk3399-power.h> 152 153 vdec: video-codec@ff660000 { 154 compatible = "rockchip,rk3399-vdec"; 155 reg = <0xff660000 0x400>; 156 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; 157 clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, 158 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; 159 clock-names = "axi", "ahb", "cabac", "core"; 160 power-domains = <&power RK3399_PD_VDU>; 161 iommus = <&vdec_mmu>; 162 }; 163 164... 165