1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/rockchip,vdec.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip Video Decoder (VDec) 8 9maintainers: 10 - Heiko Stuebner <heiko@sntech.de> 11 12description: |- 13 Rockchip SoCs have variants of the same stateless Video Decoder that can 14 decodes H.264, HEVC, VP9 and AV1 streams, depending on the variant. 15 16properties: 17 compatible: 18 oneOf: 19 - const: rockchip,rk3288-vdec 20 - const: rockchip,rk3399-vdec 21 - const: rockchip,rk3576-vdec 22 - const: rockchip,rk3588-vdec 23 - items: 24 - enum: 25 - rockchip,rk3228-vdec 26 - rockchip,rk3328-vdec 27 - const: rockchip,rk3399-vdec 28 29 reg: 30 minItems: 1 31 items: 32 - description: The function configuration registers base 33 - description: The link table configuration registers base 34 - description: The cache configuration registers base 35 36 reg-names: 37 items: 38 - const: function 39 - const: link 40 - const: cache 41 42 interrupts: 43 maxItems: 1 44 45 clocks: 46 minItems: 4 47 items: 48 - description: The Video Decoder AXI interface clock 49 - description: The Video Decoder AHB interface clock 50 - description: The Video Decoded CABAC clock 51 - description: The Video Decoder core clock 52 - description: The Video decoder HEVC CABAC clock 53 54 clock-names: 55 minItems: 4 56 items: 57 - const: axi 58 - const: ahb 59 - const: cabac 60 - const: core 61 - const: hevc_cabac 62 63 assigned-clocks: true 64 65 assigned-clock-rates: true 66 67 resets: 68 items: 69 - description: The Video Decoder AXI interface reset 70 - description: The Video Decoder AHB interface reset 71 - description: The Video Decoded CABAC reset 72 - description: The Video Decoder core reset 73 - description: The Video decoder HEVC CABAC reset 74 75 reset-names: 76 items: 77 - const: axi 78 - const: ahb 79 - const: cabac 80 - const: core 81 - const: hevc_cabac 82 83 power-domains: 84 maxItems: 1 85 86 iommus: 87 maxItems: 1 88 89 sram: 90 $ref: /schemas/types.yaml#/definitions/phandle 91 description: | 92 phandle to a reserved on-chip SRAM regions. 93 Some SoCs, like rk3588 provide on-chip SRAM to store temporary 94 buffers during decoding. 95 96required: 97 - compatible 98 - reg 99 - interrupts 100 - clocks 101 - clock-names 102 - power-domains 103 104allOf: 105 - if: 106 properties: 107 compatible: 108 contains: 109 enum: 110 - rockchip,rk3576-vdec 111 - rockchip,rk3588-vdec 112 then: 113 properties: 114 reg: 115 minItems: 3 116 reg-names: 117 minItems: 3 118 clocks: 119 minItems: 5 120 clock-names: 121 minItems: 5 122 resets: 123 minItems: 5 124 reset-names: 125 minItems: 5 126 else: 127 properties: 128 reg: 129 maxItems: 1 130 reg-names: false 131 clocks: 132 maxItems: 4 133 clock-names: 134 maxItems: 4 135 resets: false 136 reset-names: false 137 sram: false 138 139additionalProperties: false 140 141examples: 142 - | 143 #include <dt-bindings/interrupt-controller/arm-gic.h> 144 #include <dt-bindings/clock/rk3399-cru.h> 145 #include <dt-bindings/power/rk3399-power.h> 146 147 vdec: video-codec@ff660000 { 148 compatible = "rockchip,rk3399-vdec"; 149 reg = <0xff660000 0x400>; 150 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>; 151 clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>, 152 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>; 153 clock-names = "axi", "ahb", "cabac", "core"; 154 power-domains = <&power RK3399_PD_VDU>; 155 iommus = <&vdec_mmu>; 156 }; 157 158... 159