1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/renesas,fcp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Car Frame Compression Processor (FCP) 8 9maintainers: 10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 11 12description: | 13 The FCP is a companion module of video processing modules in the Renesas 14 R-Car Gen3 and RZ/G2 SoCs. It provides data compression and decompression, 15 data caching, and conversion of AXI transactions in order to reduce the 16 memory bandwidth. 17 18 There are three types of FCP: FCP for Codec (FCPC), FCP for VSP (FCPV) and 19 FCP for FDP (FCPF). Their configuration and behaviour depend on the module 20 they are paired with. These DT bindings currently support the FCPV and FCPF. 21 22properties: 23 compatible: 24 oneOf: 25 - enum: 26 - renesas,fcpv # FCP for VSP 27 - renesas,fcpf # FCP for FDP 28 - items: 29 - enum: 30 - renesas,r9a07g044-fcpvd # RZ/G2{L,LC} 31 - renesas,r9a07g054-fcpvd # RZ/V2L 32 - const: renesas,fcpv # Generic FCP for VSP fallback 33 34 reg: 35 maxItems: 1 36 37 clocks: true 38 39 clock-names: true 40 41 iommus: 42 maxItems: 1 43 44 power-domains: 45 maxItems: 1 46 47 resets: 48 maxItems: 1 49 50required: 51 - compatible 52 - reg 53 - clocks 54 - power-domains 55 - resets 56 57additionalProperties: false 58 59allOf: 60 - if: 61 properties: 62 compatible: 63 contains: 64 enum: 65 - renesas,r9a07g044-fcpvd 66 - renesas,r9a07g054-fcpvd 67 then: 68 properties: 69 clocks: 70 items: 71 - description: Main clock 72 - description: Register access clock 73 - description: Video clock 74 clock-names: 75 items: 76 - const: aclk 77 - const: pclk 78 - const: vclk 79 required: 80 - clock-names 81 else: 82 properties: 83 clocks: 84 maxItems: 1 85 clock-names: false 86 87examples: 88 # R8A7795 (R-Car H3) FCP for VSP-D1 89 - | 90 #include <dt-bindings/clock/renesas-cpg-mssr.h> 91 #include <dt-bindings/power/r8a7795-sysc.h> 92 93 fcp@fea2f000 { 94 compatible = "renesas,fcpv"; 95 reg = <0xfea2f000 0x200>; 96 clocks = <&cpg CPG_MOD 602>; 97 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 98 resets = <&cpg 602>; 99 iommus = <&ipmmu_vi0 9>; 100 }; 101... 102