xref: /linux/Documentation/devicetree/bindings/media/renesas,rzg2l-cru.yaml (revision a18004173a087573628ddc9910f0665a3829f48f)
1*a1800417SLad Prabhakar# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*a1800417SLad Prabhakar# Copyright (C) 2022 Renesas Electronics Corp.
3*a1800417SLad Prabhakar%YAML 1.2
4*a1800417SLad Prabhakar---
5*a1800417SLad Prabhakar$id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
6*a1800417SLad Prabhakar$schema: http://devicetree.org/meta-schemas/core.yaml#
7*a1800417SLad Prabhakar
8*a1800417SLad Prabhakartitle: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing
9*a1800417SLad Prabhakar
10*a1800417SLad Prabhakarmaintainers:
11*a1800417SLad Prabhakar  - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
12*a1800417SLad Prabhakar
13*a1800417SLad Prabhakardescription:
14*a1800417SLad Prabhakar  The CRU image processing module is a data conversion module equipped with pixel
15*a1800417SLad Prabhakar  color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
16*a1800417SLad Prabhakar  parallel (including ITU-R BT.656) input are provided as the image sensor interface.
17*a1800417SLad Prabhakar
18*a1800417SLad Prabhakarproperties:
19*a1800417SLad Prabhakar  compatible:
20*a1800417SLad Prabhakar    items:
21*a1800417SLad Prabhakar      - enum:
22*a1800417SLad Prabhakar          - renesas,r9a07g044-cru       # RZ/G2{L,LC}
23*a1800417SLad Prabhakar          - renesas,r9a07g054-cru       # RZ/V2L
24*a1800417SLad Prabhakar      - const: renesas,rzg2l-cru
25*a1800417SLad Prabhakar
26*a1800417SLad Prabhakar  reg:
27*a1800417SLad Prabhakar    maxItems: 1
28*a1800417SLad Prabhakar
29*a1800417SLad Prabhakar  interrupts:
30*a1800417SLad Prabhakar    maxItems: 3
31*a1800417SLad Prabhakar
32*a1800417SLad Prabhakar  interrupt-names:
33*a1800417SLad Prabhakar    items:
34*a1800417SLad Prabhakar      - const: image_conv
35*a1800417SLad Prabhakar      - const: image_conv_err
36*a1800417SLad Prabhakar      - const: axi_mst_err
37*a1800417SLad Prabhakar
38*a1800417SLad Prabhakar  clocks:
39*a1800417SLad Prabhakar    items:
40*a1800417SLad Prabhakar      - description: CRU Main clock
41*a1800417SLad Prabhakar      - description: CRU Register access clock
42*a1800417SLad Prabhakar      - description: CRU image transfer clock
43*a1800417SLad Prabhakar
44*a1800417SLad Prabhakar  clock-names:
45*a1800417SLad Prabhakar    items:
46*a1800417SLad Prabhakar      - const: video
47*a1800417SLad Prabhakar      - const: apb
48*a1800417SLad Prabhakar      - const: axi
49*a1800417SLad Prabhakar
50*a1800417SLad Prabhakar  power-domains:
51*a1800417SLad Prabhakar    maxItems: 1
52*a1800417SLad Prabhakar
53*a1800417SLad Prabhakar  resets:
54*a1800417SLad Prabhakar    items:
55*a1800417SLad Prabhakar      - description: CRU_PRESETN reset terminal
56*a1800417SLad Prabhakar      - description: CRU_ARESETN reset terminal
57*a1800417SLad Prabhakar
58*a1800417SLad Prabhakar  reset-names:
59*a1800417SLad Prabhakar    items:
60*a1800417SLad Prabhakar      - const: presetn
61*a1800417SLad Prabhakar      - const: aresetn
62*a1800417SLad Prabhakar
63*a1800417SLad Prabhakar  ports:
64*a1800417SLad Prabhakar    $ref: /schemas/graph.yaml#/properties/ports
65*a1800417SLad Prabhakar
66*a1800417SLad Prabhakar    properties:
67*a1800417SLad Prabhakar      port@0:
68*a1800417SLad Prabhakar        $ref: /schemas/graph.yaml#/$defs/port-base
69*a1800417SLad Prabhakar        unevaluatedProperties: false
70*a1800417SLad Prabhakar        description:
71*a1800417SLad Prabhakar          Input port node, single endpoint describing a parallel input source.
72*a1800417SLad Prabhakar
73*a1800417SLad Prabhakar        properties:
74*a1800417SLad Prabhakar          endpoint:
75*a1800417SLad Prabhakar            $ref: video-interfaces.yaml#
76*a1800417SLad Prabhakar            unevaluatedProperties: false
77*a1800417SLad Prabhakar
78*a1800417SLad Prabhakar            properties:
79*a1800417SLad Prabhakar              hsync-active: true
80*a1800417SLad Prabhakar              vsync-active: true
81*a1800417SLad Prabhakar              bus-width: true
82*a1800417SLad Prabhakar              data-shift: true
83*a1800417SLad Prabhakar
84*a1800417SLad Prabhakar      port@1:
85*a1800417SLad Prabhakar        $ref: /schemas/graph.yaml#/properties/port
86*a1800417SLad Prabhakar        description:
87*a1800417SLad Prabhakar          Input port node, describing the Image Processing module connected to the
88*a1800417SLad Prabhakar          CSI-2 receiver.
89*a1800417SLad Prabhakar
90*a1800417SLad Prabhakar    required:
91*a1800417SLad Prabhakar      - port@0
92*a1800417SLad Prabhakar      - port@1
93*a1800417SLad Prabhakar
94*a1800417SLad Prabhakarrequired:
95*a1800417SLad Prabhakar  - compatible
96*a1800417SLad Prabhakar  - reg
97*a1800417SLad Prabhakar  - interrupts
98*a1800417SLad Prabhakar  - interrupt-names
99*a1800417SLad Prabhakar  - clocks
100*a1800417SLad Prabhakar  - clock-names
101*a1800417SLad Prabhakar  - resets
102*a1800417SLad Prabhakar  - reset-names
103*a1800417SLad Prabhakar  - power-domains
104*a1800417SLad Prabhakar
105*a1800417SLad PrabhakaradditionalProperties: false
106*a1800417SLad Prabhakar
107*a1800417SLad Prabhakarexamples:
108*a1800417SLad Prabhakar  # Device node example with CSI-2
109*a1800417SLad Prabhakar  - |
110*a1800417SLad Prabhakar    #include <dt-bindings/clock/r9a07g044-cpg.h>
111*a1800417SLad Prabhakar    #include <dt-bindings/interrupt-controller/arm-gic.h>
112*a1800417SLad Prabhakar
113*a1800417SLad Prabhakar    cru: video@10830000 {
114*a1800417SLad Prabhakar        compatible = "renesas,r9a07g044-cru", "renesas,rzg2l-cru";
115*a1800417SLad Prabhakar        reg = <0x10830000 0x400>;
116*a1800417SLad Prabhakar        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
117*a1800417SLad Prabhakar                     <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
118*a1800417SLad Prabhakar                     <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
119*a1800417SLad Prabhakar        interrupt-names = "image_conv", "image_conv_err", "axi_mst_err";
120*a1800417SLad Prabhakar        clocks = <&cpg CPG_MOD R9A07G044_CRU_VCLK>,
121*a1800417SLad Prabhakar                 <&cpg CPG_MOD R9A07G044_CRU_PCLK>,
122*a1800417SLad Prabhakar                 <&cpg CPG_MOD R9A07G044_CRU_ACLK>;
123*a1800417SLad Prabhakar        clock-names = "video", "apb", "axi";
124*a1800417SLad Prabhakar        power-domains = <&cpg>;
125*a1800417SLad Prabhakar        resets = <&cpg R9A07G044_CRU_PRESETN>,
126*a1800417SLad Prabhakar                 <&cpg R9A07G044_CRU_ARESETN>;
127*a1800417SLad Prabhakar        reset-names = "presetn", "aresetn";
128*a1800417SLad Prabhakar
129*a1800417SLad Prabhakar        ports {
130*a1800417SLad Prabhakar            #address-cells = <1>;
131*a1800417SLad Prabhakar            #size-cells = <0>;
132*a1800417SLad Prabhakar
133*a1800417SLad Prabhakar            port@0 {
134*a1800417SLad Prabhakar                #address-cells = <1>;
135*a1800417SLad Prabhakar                #size-cells = <0>;
136*a1800417SLad Prabhakar                reg = <0>;
137*a1800417SLad Prabhakar
138*a1800417SLad Prabhakar                cru_parallel_in: endpoint@0 {
139*a1800417SLad Prabhakar                    reg = <0>;
140*a1800417SLad Prabhakar                    remote-endpoint= <&ov5642>;
141*a1800417SLad Prabhakar                    hsync-active = <1>;
142*a1800417SLad Prabhakar                    vsync-active = <1>;
143*a1800417SLad Prabhakar                };
144*a1800417SLad Prabhakar            };
145*a1800417SLad Prabhakar
146*a1800417SLad Prabhakar            port@1 {
147*a1800417SLad Prabhakar                #address-cells = <1>;
148*a1800417SLad Prabhakar                #size-cells = <0>;
149*a1800417SLad Prabhakar                reg = <1>;
150*a1800417SLad Prabhakar
151*a1800417SLad Prabhakar                cru_csi_in: endpoint@0 {
152*a1800417SLad Prabhakar                    reg = <0>;
153*a1800417SLad Prabhakar                    remote-endpoint= <&csi_cru_in>;
154*a1800417SLad Prabhakar                };
155*a1800417SLad Prabhakar            };
156*a1800417SLad Prabhakar        };
157*a1800417SLad Prabhakar    };
158