xref: /linux/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/media/qcom,msm8916-venus.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm Venus video encode and decode accelerators
9
10maintainers:
11  - Stanimir Varbanov <stanimir.varbanov@linaro.org>
12
13description: |
14  The Venus IP is a video encode and decode accelerator present
15  on Qualcomm platforms
16
17properties:
18  compatible:
19    const: qcom,msm8916-venus
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  power-domains:
28    maxItems: 1
29
30  clocks:
31    maxItems: 3
32
33  clock-names:
34    items:
35      - const: core
36      - const: iface
37      - const: bus
38
39  iommus:
40    maxItems: 1
41
42  memory-region:
43    maxItems: 1
44
45  video-decoder:
46    type: object
47
48    properties:
49      compatible:
50        const: "venus-decoder"
51
52    required:
53      - compatible
54
55    additionalProperties: false
56
57  video-encoder:
58    type: object
59
60    properties:
61      compatible:
62        const: "venus-encoder"
63
64    required:
65      - compatible
66
67    additionalProperties: false
68
69  video-firmware:
70    type: object
71
72    description: |
73      Firmware subnode is needed when the platform does not
74      have TrustZone.
75
76    properties:
77      iommus:
78        maxItems: 1
79
80    required:
81      - iommus
82
83required:
84  - compatible
85  - reg
86  - interrupts
87  - power-domains
88  - clocks
89  - clock-names
90  - iommus
91  - memory-region
92  - video-decoder
93  - video-encoder
94
95additionalProperties: false
96
97examples:
98  - |
99        #include <dt-bindings/interrupt-controller/arm-gic.h>
100        #include <dt-bindings/clock/qcom,gcc-msm8916.h>
101
102        video-codec@1d00000 {
103                compatible = "qcom,msm8916-venus";
104                reg = <0x01d00000 0xff000>;
105                interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
106                clocks = <&gcc GCC_VENUS0_VCODEC0_CLK>,
107                        <&gcc GCC_VENUS0_AHB_CLK>,
108                        <&gcc GCC_VENUS0_AXI_CLK>;
109                clock-names = "core", "iface", "bus";
110                power-domains = <&gcc VENUS_GDSC>;
111                iommus = <&apps_iommu 5>;
112                memory-region = <&venus_mem>;
113
114                video-decoder {
115                        compatible = "venus-decoder";
116                };
117
118                video-encoder {
119                        compatible = "venus-encoder";
120                };
121        };
122