1*936996afSMoudy Ho# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*936996afSMoudy Ho%YAML 1.2 3*936996afSMoudy Ho--- 4*936996afSMoudy Ho$id: http://devicetree.org/schemas/media/mediatek,mdp3-fg.yaml# 5*936996afSMoudy Ho$schema: http://devicetree.org/meta-schemas/core.yaml# 6*936996afSMoudy Ho 7*936996afSMoudy Hotitle: MediaTek Media Data Path 3 Film Grain 8*936996afSMoudy Ho 9*936996afSMoudy Homaintainers: 10*936996afSMoudy Ho - Matthias Brugger <matthias.bgg@gmail.com> 11*936996afSMoudy Ho - Moudy Ho <moudy.ho@mediatek.com> 12*936996afSMoudy Ho 13*936996afSMoudy Hodescription: 14*936996afSMoudy Ho Film Grain (FG) is a Media Data Path 3 (MDP3) component used to add 15*936996afSMoudy Ho the film grain according to the AOMedia Video 1 (AV1) standard. 16*936996afSMoudy Ho 17*936996afSMoudy Hoproperties: 18*936996afSMoudy Ho compatible: 19*936996afSMoudy Ho enum: 20*936996afSMoudy Ho - mediatek,mt8195-mdp3-fg 21*936996afSMoudy Ho 22*936996afSMoudy Ho reg: 23*936996afSMoudy Ho maxItems: 1 24*936996afSMoudy Ho 25*936996afSMoudy Ho mediatek,gce-client-reg: 26*936996afSMoudy Ho description: 27*936996afSMoudy Ho The register of display function block to be set by gce. There are 4 arguments, 28*936996afSMoudy Ho such as gce node, subsys id, offset and register size. The subsys id that is 29*936996afSMoudy Ho mapping to the register of display function blocks is defined in the gce header 30*936996afSMoudy Ho include/dt-bindings/gce/<chip>-gce.h of each chips. 31*936996afSMoudy Ho $ref: /schemas/types.yaml#/definitions/phandle-array 32*936996afSMoudy Ho items: 33*936996afSMoudy Ho items: 34*936996afSMoudy Ho - description: phandle of GCE 35*936996afSMoudy Ho - description: GCE subsys id 36*936996afSMoudy Ho - description: register offset 37*936996afSMoudy Ho - description: register size 38*936996afSMoudy Ho maxItems: 1 39*936996afSMoudy Ho 40*936996afSMoudy Ho clocks: 41*936996afSMoudy Ho maxItems: 1 42*936996afSMoudy Ho 43*936996afSMoudy Horequired: 44*936996afSMoudy Ho - compatible 45*936996afSMoudy Ho - reg 46*936996afSMoudy Ho - mediatek,gce-client-reg 47*936996afSMoudy Ho - clocks 48*936996afSMoudy Ho 49*936996afSMoudy HoadditionalProperties: false 50*936996afSMoudy Ho 51*936996afSMoudy Hoexamples: 52*936996afSMoudy Ho - | 53*936996afSMoudy Ho #include <dt-bindings/clock/mt8195-clk.h> 54*936996afSMoudy Ho #include <dt-bindings/gce/mt8195-gce.h> 55*936996afSMoudy Ho 56*936996afSMoudy Ho display@14002000 { 57*936996afSMoudy Ho compatible = "mediatek,mt8195-mdp3-fg"; 58*936996afSMoudy Ho reg = <0x14002000 0x1000>; 59*936996afSMoudy Ho mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x2000 0x1000>; 60*936996afSMoudy Ho clocks = <&vppsys0 CLK_VPP0_MDP_FG>; 61*936996afSMoudy Ho }; 62