1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2# Copyright (c) 2023 MediaTek Inc. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/media/i2c/galaxycore,gc08a3.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: GalaxyCore gc08a3 1/4" 8M Pixel MIPI CSI-2 sensor 9 10maintainers: 11 - Zhi Mao <zhi.mao@mediatek.com> 12 13description: 14 The gc08a3 is a raw image sensor with an MIPI CSI-2 image data 15 interface and CCI (I2C compatible) control bus. The output format 16 is raw Bayer. 17 18properties: 19 compatible: 20 const: galaxycore,gc08a3 21 22 reg: 23 maxItems: 1 24 25 clocks: 26 maxItems: 1 27 28 dovdd-supply: true 29 30 avdd-supply: true 31 32 dvdd-supply: true 33 34 reset-gpios: 35 description: Reference to the GPIO connected to the RESETB pin. 36 maxItems: 1 37 38 port: 39 $ref: /schemas/graph.yaml#/$defs/port-base 40 additionalProperties: false 41 description: 42 Output port node, single endpoint describing the CSI-2 transmitter. 43 44 properties: 45 endpoint: 46 $ref: /schemas/media/video-interfaces.yaml# 47 unevaluatedProperties: false 48 49 properties: 50 data-lanes: 51 oneOf: 52 - items: 53 - const: 1 54 - const: 2 55 - const: 3 56 - const: 4 57 - items: 58 - const: 1 59 - const: 2 60 61 link-frequencies: true 62 63 required: 64 - data-lanes 65 - link-frequencies 66 67 required: 68 - endpoint 69 70required: 71 - compatible 72 - reg 73 - clocks 74 - dovdd-supply 75 - avdd-supply 76 - dvdd-supply 77 - reset-gpios 78 - port 79 80additionalProperties: false 81 82examples: 83 - | 84 #include <dt-bindings/gpio/gpio.h> 85 86 i2c { 87 #address-cells = <1>; 88 #size-cells = <0>; 89 90 sensor@31 { 91 compatible = "galaxycore,gc08a3"; 92 reg = <0x31>; 93 94 clocks = <&gc08a3_clk>; 95 96 reset-gpios = <&pio 19 GPIO_ACTIVE_LOW>; 97 98 avdd-supply = <&gc08a3_avdd>; 99 dovdd-supply = <&gc08a3_dovdd>; 100 dvdd-supply = <&gc08a3_dvdd>; 101 102 port { 103 sensor_out: endpoint { 104 data-lanes = <1 2 3 4>; 105 link-frequencies = /bits/ 64 <336000000 207000000>; 106 remote-endpoint = <&seninf_csi_port_0_in>; 107 }; 108 }; 109 }; 110 }; 111 112... 113