1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Cadence MIPI-CSI2 RX controller 8 9maintainers: 10 - Maxime Ripard <mripard@kernel.org> 11 12description: 13 The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI 14 lanes in input, and 4 different pixel streams in output. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - starfive,jh7110-csi2rx 21 - const: cdns,csi2rx 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: CSI2Rx system clock 29 - description: Gated Register bank clock for APB interface 30 - description: pixel Clock for Stream interface 0 31 - description: pixel Clock for Stream interface 1 32 - description: pixel Clock for Stream interface 2 33 - description: pixel Clock for Stream interface 3 34 35 clock-names: 36 items: 37 - const: sys_clk 38 - const: p_clk 39 - const: pixel_if0_clk 40 - const: pixel_if1_clk 41 - const: pixel_if2_clk 42 - const: pixel_if3_clk 43 44 phys: 45 maxItems: 1 46 description: MIPI D-PHY 47 48 phy-names: 49 items: 50 - const: dphy 51 52 ports: 53 $ref: /schemas/graph.yaml#/properties/ports 54 55 properties: 56 port@0: 57 $ref: /schemas/graph.yaml#/$defs/port-base 58 unevaluatedProperties: false 59 description: 60 Input port node, single endpoint describing the CSI-2 transmitter. 61 62 properties: 63 endpoint: 64 $ref: video-interfaces.yaml# 65 unevaluatedProperties: false 66 67 properties: 68 bus-type: 69 const: 4 70 71 clock-lanes: 72 const: 0 73 74 data-lanes: 75 minItems: 1 76 maxItems: 4 77 items: 78 maximum: 4 79 80 required: 81 - data-lanes 82 83 port@1: 84 $ref: /schemas/graph.yaml#/properties/port 85 description: 86 Stream 0 Output port node 87 88 port@2: 89 $ref: /schemas/graph.yaml#/properties/port 90 description: 91 Stream 1 Output port node 92 93 port@3: 94 $ref: /schemas/graph.yaml#/properties/port 95 description: 96 Stream 2 Output port node 97 98 port@4: 99 $ref: /schemas/graph.yaml#/properties/port 100 description: 101 Stream 3 Output port node 102 103 required: 104 - port@0 105 106required: 107 - compatible 108 - reg 109 - clocks 110 - clock-names 111 - ports 112 113additionalProperties: false 114 115examples: 116 - | 117 csi@d060000 { 118 compatible = "starfive,jh7110-csi2rx", "cdns,csi2rx"; 119 reg = <0x0d060000 0x1000>; 120 clocks = <&byteclock 7>, <&byteclock 6>, 121 <&coreclock 8>, <&coreclock 9>, 122 <&coreclock 10>, <&coreclock 11>; 123 clock-names = "sys_clk", "p_clk", 124 "pixel_if0_clk", "pixel_if1_clk", 125 "pixel_if2_clk", "pixel_if3_clk"; 126 phys = <&csi_phy>; 127 phy-names = "dphy"; 128 129 ports { 130 #address-cells = <1>; 131 #size-cells = <0>; 132 133 port@0 { 134 reg = <0>; 135 136 csi2rx_in_sensor: endpoint { 137 remote-endpoint = <&sensor_out_csi2rx>; 138 clock-lanes = <0>; 139 data-lanes = <1 2>; 140 }; 141 }; 142 143 port@1 { 144 reg = <1>; 145 146 csi2rx_out_grabber0: endpoint { 147 remote-endpoint = <&grabber0_in_csi2rx>; 148 }; 149 }; 150 151 port@2 { 152 reg = <2>; 153 154 csi2rx_out_grabber1: endpoint { 155 remote-endpoint = <&grabber1_in_csi2rx>; 156 }; 157 }; 158 159 port@3 { 160 reg = <3>; 161 162 csi2rx_out_grabber2: endpoint { 163 remote-endpoint = <&grabber2_in_csi2rx>; 164 }; 165 }; 166 167 port@4 { 168 reg = <4>; 169 170 csi2rx_out_grabber3: endpoint { 171 remote-endpoint = <&grabber3_in_csi2rx>; 172 }; 173 }; 174 }; 175 }; 176 177... 178