xref: /linux/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml (revision 94e14da890b1b68526b5f87ff1c97f374fd2471e) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13description: |-
14  The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
15  frames from a parallel or BT656 sensor.
16
17properties:
18  compatible:
19    const: allwinner,sun7i-a20-csi0
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    items:
29      - description: The CSI interface clock
30      - description: The CSI ISP clock
31      - description: The CSI DRAM clock
32
33  clock-names:
34    items:
35      - const: bus
36      - const: isp
37      - const: ram
38
39  resets:
40    maxItems: 1
41
42  # See ./video-interfaces.txt for details
43  port:
44    type: object
45    additionalProperties: false
46
47    properties:
48      endpoint:
49        type: object
50
51        properties:
52          bus-width:
53            enum: [8, 16]
54
55          data-active: true
56          hsync-active: true
57          pclk-sample: true
58          remote-endpoint: true
59          vsync-active: true
60
61        required:
62          - bus-width
63          - data-active
64          - hsync-active
65          - pclk-sample
66          - remote-endpoint
67          - vsync-active
68
69    required:
70      - endpoint
71
72required:
73  - compatible
74  - reg
75  - interrupts
76  - clocks
77
78additionalProperties: false
79
80examples:
81  - |
82    #include <dt-bindings/interrupt-controller/arm-gic.h>
83    #include <dt-bindings/clock/sun7i-a20-ccu.h>
84    #include <dt-bindings/reset/sun4i-a10-ccu.h>
85
86    csi0: csi@1c09000 {
87        compatible = "allwinner,sun7i-a20-csi0";
88        reg = <0x01c09000 0x1000>;
89        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
90        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
91        clock-names = "bus", "isp", "ram";
92        resets = <&ccu RST_CSI0>;
93
94        port {
95            csi_from_ov5640: endpoint {
96                remote-endpoint = <&ov5640_to_csi>;
97                bus-width = <8>;
98                hsync-active = <1>; /* Active high */
99                vsync-active = <0>; /* Active low */
100                data-active = <1>;  /* Active high */
101                pclk-sample = <1>;  /* Rising */
102            };
103        };
104    };
105
106...
107