xref: /linux/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml (revision 4092de1ba34eb376791809fb366bc15f8a9e0b7c) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/allwinner,sun4i-a10-csi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <maxime.ripard@bootlin.com>
12
13description: |-
14  The Allwinner A10 and later has a CMOS Sensor Interface to retrieve
15  frames from a parallel or BT656 sensor.
16
17properties:
18  compatible:
19    const: allwinner,sun7i-a20-csi0
20
21  reg:
22    maxItems: 1
23
24  interrupts:
25    maxItems: 1
26
27  clocks:
28    items:
29      - description: The CSI interface clock
30      - description: The CSI module clock
31      - description: The CSI ISP clock
32      - description: The CSI DRAM clock
33
34  clock-names:
35    items:
36      - const: bus
37      - const: mod
38      - const: isp
39      - const: ram
40
41  resets:
42    maxItems: 1
43
44  # See ./video-interfaces.txt for details
45  port:
46    type: object
47    additionalProperties: false
48
49    properties:
50      endpoint:
51        type: object
52
53        properties:
54          bus-width:
55            enum: [8, 16]
56
57          data-active: true
58          hsync-active: true
59          pclk-sample: true
60          remote-endpoint: true
61          vsync-active: true
62
63        required:
64          - bus-width
65          - data-active
66          - hsync-active
67          - pclk-sample
68          - remote-endpoint
69          - vsync-active
70
71    required:
72      - endpoint
73
74required:
75  - compatible
76  - reg
77  - interrupts
78  - clocks
79
80additionalProperties: false
81
82examples:
83  - |
84    #include <dt-bindings/interrupt-controller/arm-gic.h>
85    #include <dt-bindings/clock/sun7i-a20-ccu.h>
86    #include <dt-bindings/reset/sun4i-a10-ccu.h>
87
88    csi0: csi@1c09000 {
89        compatible = "allwinner,sun7i-a20-csi0";
90        reg = <0x01c09000 0x1000>;
91        interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
92        clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI0>,
93                 <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>;
94        clock-names = "bus", "mod", "isp", "ram";
95        resets = <&ccu RST_CSI0>;
96
97        port {
98            csi_from_ov5640: endpoint {
99                remote-endpoint = <&ov5640_to_csi>;
100                bus-width = <8>;
101                hsync-active = <1>; /* Active high */
102                vsync-active = <0>; /* Active low */
103                data-active = <1>;  /* Active high */
104                pclk-sample = <1>;  /* Rising */
105            };
106        };
107    };
108
109...
110