1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Allwinner A10 CMOS Sensor Interface (CSI) Device Tree Bindings 8 9maintainers: 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 12 13description: |- 14 The Allwinner A10 and later has a CMOS Sensor Interface to retrieve 15 frames from a parallel or BT656 sensor. 16 17properties: 18 compatible: 19 oneOf: 20 - const: allwinner,sun4i-a10-csi1 21 - const: allwinner,sun7i-a20-csi0 22 - items: 23 - const: allwinner,sun7i-a20-csi1 24 - const: allwinner,sun4i-a10-csi1 25 - items: 26 - const: allwinner,sun8i-r40-csi0 27 - const: allwinner,sun7i-a20-csi0 28 29 reg: 30 maxItems: 1 31 32 interrupts: 33 maxItems: 1 34 35 clocks: 36 minItems: 2 37 maxItems: 3 38 items: 39 - description: The CSI interface clock 40 - description: The CSI ISP clock 41 - description: The CSI DRAM clock 42 43 clock-names: 44 minItems: 2 45 maxItems: 3 46 items: 47 - const: bus 48 - const: isp 49 - const: ram 50 51 resets: 52 maxItems: 1 53 54 # FIXME: This should be made required eventually once every SoC will 55 # have the MBUS declared. 56 interconnects: 57 maxItems: 1 58 59 # FIXME: This should be made required eventually once every SoC will 60 # have the MBUS declared. 61 interconnect-names: 62 const: dma-mem 63 64 # See ./video-interfaces.txt for details 65 port: 66 type: object 67 additionalProperties: false 68 69 properties: 70 endpoint: 71 type: object 72 73 properties: 74 bus-width: 75 enum: [8, 16] 76 77 data-active: true 78 hsync-active: true 79 pclk-sample: true 80 remote-endpoint: true 81 vsync-active: true 82 83 required: 84 - bus-width 85 - data-active 86 - hsync-active 87 - pclk-sample 88 - remote-endpoint 89 - vsync-active 90 91 required: 92 - endpoint 93 94required: 95 - compatible 96 - reg 97 - interrupts 98 - clocks 99 100additionalProperties: false 101 102examples: 103 - | 104 #include <dt-bindings/interrupt-controller/arm-gic.h> 105 #include <dt-bindings/clock/sun7i-a20-ccu.h> 106 #include <dt-bindings/reset/sun4i-a10-ccu.h> 107 108 csi0: csi@1c09000 { 109 compatible = "allwinner,sun7i-a20-csi0"; 110 reg = <0x01c09000 0x1000>; 111 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 112 clocks = <&ccu CLK_AHB_CSI0>, <&ccu CLK_CSI_SCLK>, <&ccu CLK_DRAM_CSI0>; 113 clock-names = "bus", "isp", "ram"; 114 resets = <&ccu RST_CSI0>; 115 116 port { 117 csi_from_ov5640: endpoint { 118 remote-endpoint = <&ov5640_to_csi>; 119 bus-width = <8>; 120 hsync-active = <1>; /* Active high */ 121 vsync-active = <0>; /* Active low */ 122 data-active = <1>; /* Active high */ 123 pclk-sample = <1>; /* Rising */ 124 }; 125 }; 126 }; 127 128... 129