xref: /linux/Documentation/devicetree/bindings/mailbox/mtk,adsp-mbox.yaml (revision 5c2e7736e20d9b348a44cafbfa639fe2653fbc34) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek ADSP mailbox
8
9maintainers:
10  - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
11
12description: |
13  The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
14  to communicate with ADSP by passing messages through two mailbox channels.
15  The MTK ADSP mailbox IPC also provides the ability for one processor to
16  signal the other processor using interrupts.
17
18properties:
19  compatible:
20    oneOf:
21      - enum:
22          - mediatek,mt8186-adsp-mbox
23          - mediatek,mt8195-adsp-mbox
24      - items:
25          - enum:
26              - mediatek,mt8188-adsp-mbox
27          - const: mediatek,mt8186-adsp-mbox
28
29
30  "#mbox-cells":
31    const: 0
32
33  reg:
34    maxItems: 1
35
36  interrupts:
37    maxItems: 1
38
39required:
40  - compatible
41  - "#mbox-cells"
42  - reg
43  - interrupts
44
45additionalProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/interrupt-controller/arm-gic.h>
50    #include <dt-bindings/interrupt-controller/irq.h>
51
52    adsp_mailbox0:mailbox@10816000 {
53        compatible = "mediatek,mt8195-adsp-mbox";
54        #mbox-cells = <0>;
55        reg = <0x10816000 0x1000>;
56        interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
57    };
58