xref: /linux/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml (revision db4a3f0fbedb0398f77b9047e8b8bb2b49f355bb) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek Global Command Engine Mailbox
8
9maintainers:
10  - Houlong Wei <houlong.wei@mediatek.com>
11
12description:
13  The Global Command Engine (GCE) is used to help read/write registers with
14  critical time limitation, such as updating display configuration during the
15  vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
16
17properties:
18  compatible:
19    oneOf:
20      - enum:
21          - mediatek,mt6779-gce
22          - mediatek,mt8173-gce
23          - mediatek,mt8183-gce
24          - mediatek,mt8186-gce
25          - mediatek,mt8188-gce
26          - mediatek,mt8192-gce
27          - mediatek,mt8195-gce
28          - mediatek,mt8196-gce
29      - items:
30          - const: mediatek,mt6795-gce
31          - const: mediatek,mt8173-gce
32
33  "#mbox-cells":
34    const: 2
35    description:
36      The first cell describes the Thread ID of the GCE,
37      the second cell describes the priority of the GCE thread
38
39  reg:
40    maxItems: 1
41
42  interrupts:
43    maxItems: 1
44
45  clocks:
46    items:
47      - description: Global Command Engine clock
48
49  clock-names:
50    items:
51      - const: gce
52
53  iommus:
54    maxItems: 1
55
56required:
57  - compatible
58  - "#mbox-cells"
59  - reg
60  - interrupts
61  - clocks
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/clock/mt8173-clk.h>
68    #include <dt-bindings/interrupt-controller/arm-gic.h>
69    #include <dt-bindings/interrupt-controller/irq.h>
70
71    soc {
72        #address-cells = <2>;
73        #size-cells = <2>;
74
75        gce: mailbox@10212000 {
76            compatible = "mediatek,mt8173-gce";
77            reg = <0 0x10212000 0 0x1000>;
78            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
79            #mbox-cells = <2>;
80            clocks = <&infracfg CLK_INFRA_GCE>;
81            clock-names = "gce";
82        };
83    };
84