xref: /linux/Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml (revision 156010ed9c2ac1e9df6c11b1f688cf8a6e0152e6) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Mediatek Global Command Engine Mailbox
8
9maintainers:
10  - Houlong Wei <houlong.wei@mediatek.com>
11
12description:
13  The Global Command Engine (GCE) is used to help read/write registers with
14  critical time limitation, such as updating display configuration during the
15  vblank. The GCE can be used to implement the Command Queue (CMDQ) driver.
16
17properties:
18  compatible:
19    enum:
20      - mediatek,mt6779-gce
21      - mediatek,mt8173-gce
22      - mediatek,mt8183-gce
23      - mediatek,mt8186-gce
24      - mediatek,mt8188-gce
25      - mediatek,mt8192-gce
26      - mediatek,mt8195-gce
27
28  "#mbox-cells":
29    const: 2
30    description:
31      The first cell describes the Thread ID of the GCE,
32      the second cell describes the priority of the GCE thread
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    maxItems: 1
39
40  clocks:
41    items:
42      - description: Global Command Engine clock
43
44  clock-names:
45    items:
46      - const: gce
47
48required:
49  - compatible
50  - "#mbox-cells"
51  - reg
52  - interrupts
53  - clocks
54
55allOf:
56  - if:
57      not:
58        properties:
59          compatible:
60            contains:
61              const: mediatek,mt8195-gce
62    then:
63      required:
64        - clock-names
65
66additionalProperties: false
67
68examples:
69  - |
70    #include <dt-bindings/clock/mt8173-clk.h>
71    #include <dt-bindings/interrupt-controller/arm-gic.h>
72    #include <dt-bindings/interrupt-controller/irq.h>
73
74    soc {
75        #address-cells = <2>;
76        #size-cells = <2>;
77
78        gce: mailbox@10212000 {
79            compatible = "mediatek,mt8173-gce";
80            reg = <0 0x10212000 0 0x1000>;
81            interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
82            #mbox-cells = <2>;
83            clocks = <&infracfg CLK_INFRA_GCE>;
84            clock-names = "gce";
85        };
86    };
87