1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/mailbox/mediatek,gce-mailbox.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Mediatek Global Command Engine Mailbox 8 9maintainers: 10 - Houlong Wei <houlong.wei@mediatek.com> 11 12description: 13 The Global Command Engine (GCE) is used to help read/write registers with 14 critical time limitation, such as updating display configuration during the 15 vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. 16 17properties: 18 compatible: 19 oneOf: 20 - enum: 21 - mediatek,mt6779-gce 22 - mediatek,mt8173-gce 23 - mediatek,mt8183-gce 24 - mediatek,mt8186-gce 25 - mediatek,mt8188-gce 26 - mediatek,mt8192-gce 27 - mediatek,mt8195-gce 28 - items: 29 - const: mediatek,mt6795-gce 30 - const: mediatek,mt8173-gce 31 32 "#mbox-cells": 33 const: 2 34 description: 35 The first cell describes the Thread ID of the GCE, 36 the second cell describes the priority of the GCE thread 37 38 reg: 39 maxItems: 1 40 41 interrupts: 42 maxItems: 1 43 44 clocks: 45 items: 46 - description: Global Command Engine clock 47 48 clock-names: 49 items: 50 - const: gce 51 52required: 53 - compatible 54 - "#mbox-cells" 55 - reg 56 - interrupts 57 - clocks 58 59allOf: 60 - if: 61 not: 62 properties: 63 compatible: 64 contains: 65 const: mediatek,mt8195-gce 66 then: 67 required: 68 - clock-names 69 70additionalProperties: false 71 72examples: 73 - | 74 #include <dt-bindings/clock/mt8173-clk.h> 75 #include <dt-bindings/interrupt-controller/arm-gic.h> 76 #include <dt-bindings/interrupt-controller/irq.h> 77 78 soc { 79 #address-cells = <2>; 80 #size-cells = <2>; 81 82 gce: mailbox@10212000 { 83 compatible = "mediatek,mt8173-gce"; 84 reg = <0 0x10212000 0 0x1000>; 85 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; 86 #mbox-cells = <2>; 87 clocks = <&infracfg CLK_INFRA_GCE>; 88 clock-names = "gce"; 89 }; 90 }; 91