1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/iommu/apple,dart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Apple DART IOMMU 8 9maintainers: 10 - Sven Peter <sven@svenpeter.dev> 11 12description: |+ 13 Apple SoCs may contain an implementation of their Device Address 14 Resolution Table which provides a mandatory layer of address 15 translations for various masters. 16 17 Each DART instance is capable of handling up to 16 different streams 18 with individual pagetables and page-level read/write protection flags. 19 20 This DART IOMMU also raises interrupts in response to various 21 fault conditions. 22 23properties: 24 compatible: 25 const: apple,t8103-dart 26 27 reg: 28 maxItems: 1 29 30 interrupts: 31 maxItems: 1 32 33 clocks: 34 description: 35 Reference to the gate clock phandle if required for this IOMMU. 36 Optional since not all IOMMUs are attached to a clock gate. 37 38 '#iommu-cells': 39 const: 1 40 description: 41 Has to be one. The single cell describes the stream id emitted by 42 a master to the IOMMU. 43 44 power-domains: 45 maxItems: 1 46 47required: 48 - compatible 49 - reg 50 - '#iommu-cells' 51 - interrupts 52 53additionalProperties: false 54 55examples: 56 - |+ 57 dart1: iommu@82f80000 { 58 compatible = "apple,t8103-dart"; 59 reg = <0x82f80000 0x4000>; 60 interrupts = <1 781 4>; 61 #iommu-cells = <1>; 62 }; 63 64 master1 { 65 iommus = <&dart1 0>; 66 }; 67 68 - |+ 69 dart2a: iommu@82f00000 { 70 compatible = "apple,t8103-dart"; 71 reg = <0x82f00000 0x4000>; 72 interrupts = <1 781 4>; 73 #iommu-cells = <1>; 74 }; 75 dart2b: iommu@82f80000 { 76 compatible = "apple,t8103-dart"; 77 reg = <0x82f80000 0x4000>; 78 interrupts = <1 781 4>; 79 #iommu-cells = <1>; 80 }; 81 82 master2 { 83 iommus = <&dart2a 0>, <&dart2b 1>; 84 }; 85