1*eb3fcf00SRob Herring* TI Common Platform Interrupt Controller 2*eb3fcf00SRob Herring 3*eb3fcf00SRob HerringCommon Platform Interrupt Controller (cp_intc) is used on 4*eb3fcf00SRob HerringOMAP-L1x SoCs and can support several configurable number 5*eb3fcf00SRob Herringof interrupts. 6*eb3fcf00SRob Herring 7*eb3fcf00SRob HerringMain node required properties: 8*eb3fcf00SRob Herring 9*eb3fcf00SRob Herring- compatible : should be: 10*eb3fcf00SRob Herring "ti,cp-intc" 11*eb3fcf00SRob Herring- interrupt-controller : Identifies the node as an interrupt controller 12*eb3fcf00SRob Herring- #interrupt-cells : Specifies the number of cells needed to encode an 13*eb3fcf00SRob Herring interrupt source. The type shall be a <u32> and the value shall be 1. 14*eb3fcf00SRob Herring 15*eb3fcf00SRob Herring The cell contains the interrupt number in the range [0-128]. 16*eb3fcf00SRob Herring- ti,intc-size: Number of interrupts handled by the interrupt controller. 17*eb3fcf00SRob Herring- reg: physical base address and size of the intc registers map. 18*eb3fcf00SRob Herring 19*eb3fcf00SRob HerringExample: 20*eb3fcf00SRob Herring 21*eb3fcf00SRob Herring intc: interrupt-controller@1 { 22*eb3fcf00SRob Herring compatible = "ti,cp-intc"; 23*eb3fcf00SRob Herring interrupt-controller; 24*eb3fcf00SRob Herring #interrupt-cells = <1>; 25*eb3fcf00SRob Herring ti,intc-size = <101>; 26*eb3fcf00SRob Herring reg = <0xfffee000 0x2000>; 27*eb3fcf00SRob Herring }; 28