1Synopsys DesignWare APB interrupt controller (dw_apb_ictl) 2 3Synopsys DesignWare provides interrupt controller IP for APB known as 4dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with 5APB bus, e.g. Marvell Armada 1500. 6 7Required properties: 8- compatible: shall be "snps,dw-apb-ictl" 9- reg: physical base address of the controller and length of memory mapped 10 region starting with ENABLE_LOW register 11- interrupt-controller: identifies the node as an interrupt controller 12- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 13- interrupts: interrupt reference to primary interrupt controller 14- interrupt-parent: (optional) reference specific primary interrupt controller 15 16The interrupt sources map to the corresponding bits in the interrupt 17registers, i.e. 18- 0 maps to bit 0 of low interrupts, 19- 1 maps to bit 1 of low interrupts, 20- 32 maps to bit 0 of high interrupts, 21- 33 maps to bit 1 of high interrupts, 22- (optional) fast interrupts start at 64. 23 24Example: 25 aic: interrupt-controller@3000 { 26 compatible = "snps,dw-apb-ictl"; 27 reg = <0x3000 0xc00>; 28 interrupt-controller; 29 #interrupt-cells = <1>; 30 interrupt-parent = <&gic>; 31 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 32 }; 33