1*76f75212SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*76f75212SRob Herring (Arm)%YAML 1.2 3*76f75212SRob Herring (Arm)--- 4*76f75212SRob Herring (Arm)$id: http://devicetree.org/schemas/snps,archs-idu-intc.yaml# 5*76f75212SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 6*76f75212SRob Herring (Arm) 7*76f75212SRob Herring (Arm)title: ARC-HS Interrupt Distribution Unit 8*76f75212SRob Herring (Arm) 9*76f75212SRob Herring (Arm)maintainers: 10*76f75212SRob Herring (Arm) - Vineet Gupta <vgupta@kernel.org> 11*76f75212SRob Herring (Arm) 12*76f75212SRob Herring (Arm)description: > 13*76f75212SRob Herring (Arm) ARC-HS Interrupt Distribution Unit is an optional 2nd level interrupt 14*76f75212SRob Herring (Arm) controller which can be used in SMP configurations for dynamic IRQ routing, 15*76f75212SRob Herring (Arm) load balancing of common/external IRQs towards core intc. 16*76f75212SRob Herring (Arm) 17*76f75212SRob Herring (Arm) The interrupt controller is accessed via the special ARC AUX register 18*76f75212SRob Herring (Arm) interface, hence "reg" property is not specified. 19*76f75212SRob Herring (Arm) 20*76f75212SRob Herring (Arm)properties: 21*76f75212SRob Herring (Arm) compatible: 22*76f75212SRob Herring (Arm) const: snps,archs-idu-intc 23*76f75212SRob Herring (Arm) 24*76f75212SRob Herring (Arm) interrupt-controller: true 25*76f75212SRob Herring (Arm) 26*76f75212SRob Herring (Arm) '#interrupt-cells': 27*76f75212SRob Herring (Arm) description: | 28*76f75212SRob Herring (Arm) Number of interrupt specifier cells: 29*76f75212SRob Herring (Arm) - 1: only a common IRQ is specified. 30*76f75212SRob Herring (Arm) - 2: a second cell encodes trigger type and level flags: 31*76f75212SRob Herring (Arm) 1 = low-to-high edge triggered 32*76f75212SRob Herring (Arm) 4 = active high level-sensitive (default) 33*76f75212SRob Herring (Arm) enum: [1, 2] 34*76f75212SRob Herring (Arm) 35*76f75212SRob Herring (Arm)required: 36*76f75212SRob Herring (Arm) - compatible 37*76f75212SRob Herring (Arm) - interrupt-controller 38*76f75212SRob Herring (Arm) - '#interrupt-cells' 39*76f75212SRob Herring (Arm) 40*76f75212SRob Herring (Arm)additionalProperties: false 41*76f75212SRob Herring (Arm) 42*76f75212SRob Herring (Arm)examples: 43*76f75212SRob Herring (Arm) - | 44*76f75212SRob Herring (Arm) interrupt-controller { 45*76f75212SRob Herring (Arm) compatible = "snps,archs-idu-intc"; 46*76f75212SRob Herring (Arm) interrupt-controller; 47*76f75212SRob Herring (Arm) #interrupt-cells = <1>; 48*76f75212SRob Herring (Arm) }; 49