1350d71b9SSebastian HesselbarthSynopsys DesignWare APB interrupt controller (dw_apb_ictl) 2350d71b9SSebastian Hesselbarth 3350d71b9SSebastian HesselbarthSynopsys DesignWare provides interrupt controller IP for APB known as 4350d71b9SSebastian Hesselbarthdw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with 5*8156b80fSZhen LeiAPB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt 6*8156b80fSZhen Leicontroller in some SoCs, e.g. Hisilicon SD5203. 7350d71b9SSebastian Hesselbarth 8350d71b9SSebastian HesselbarthRequired properties: 9350d71b9SSebastian Hesselbarth- compatible: shall be "snps,dw-apb-ictl" 10350d71b9SSebastian Hesselbarth- reg: physical base address of the controller and length of memory mapped 11350d71b9SSebastian Hesselbarth region starting with ENABLE_LOW register 12350d71b9SSebastian Hesselbarth- interrupt-controller: identifies the node as an interrupt controller 13350d71b9SSebastian Hesselbarth- #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 14*8156b80fSZhen Lei 15*8156b80fSZhen LeiAdditional required property when it's used as secondary interrupt controller: 16350d71b9SSebastian Hesselbarth- interrupts: interrupt reference to primary interrupt controller 17350d71b9SSebastian Hesselbarth 18350d71b9SSebastian HesselbarthThe interrupt sources map to the corresponding bits in the interrupt 19350d71b9SSebastian Hesselbarthregisters, i.e. 20350d71b9SSebastian Hesselbarth- 0 maps to bit 0 of low interrupts, 21350d71b9SSebastian Hesselbarth- 1 maps to bit 1 of low interrupts, 22350d71b9SSebastian Hesselbarth- 32 maps to bit 0 of high interrupts, 23350d71b9SSebastian Hesselbarth- 33 maps to bit 1 of high interrupts, 24350d71b9SSebastian Hesselbarth- (optional) fast interrupts start at 64. 25350d71b9SSebastian Hesselbarth 26350d71b9SSebastian HesselbarthExample: 27*8156b80fSZhen Lei /* dw_apb_ictl is used as secondary interrupt controller */ 28350d71b9SSebastian Hesselbarth aic: interrupt-controller@3000 { 29350d71b9SSebastian Hesselbarth compatible = "snps,dw-apb-ictl"; 30350d71b9SSebastian Hesselbarth reg = <0x3000 0xc00>; 31350d71b9SSebastian Hesselbarth interrupt-controller; 32350d71b9SSebastian Hesselbarth #interrupt-cells = <1>; 33350d71b9SSebastian Hesselbarth interrupt-parent = <&gic>; 34350d71b9SSebastian Hesselbarth interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 35350d71b9SSebastian Hesselbarth }; 36*8156b80fSZhen Lei 37*8156b80fSZhen Lei /* dw_apb_ictl is used as primary interrupt controller */ 38*8156b80fSZhen Lei vic: interrupt-controller@10130000 { 39*8156b80fSZhen Lei compatible = "snps,dw-apb-ictl"; 40*8156b80fSZhen Lei reg = <0x10130000 0x1000>; 41*8156b80fSZhen Lei interrupt-controller; 42*8156b80fSZhen Lei #interrupt-cells = <1>; 43*8156b80fSZhen Lei }; 44