1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/renesas,rzv2h-icu.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas RZ/V2H(P) Interrupt Control Unit 8 9maintainers: 10 - Fabrizio Castro <fabrizio.castro.jz@renesas.com> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 12 13allOf: 14 - $ref: /schemas/interrupt-controller.yaml# 15 16description: 17 The Interrupt Control Unit (ICU) handles external interrupts (NMI, IRQ, and 18 TINT), error interrupts, DMAC requests, GPT interrupts, and internal 19 interrupts. 20 21properties: 22 compatible: 23 const: renesas,r9a09g057-icu # RZ/V2H(P) 24 25 '#interrupt-cells': 26 description: The first cell is the SPI number of the NMI or the 27 PORT_IRQ[0-15] interrupt, as per user manual. The second cell is used to 28 specify the flag. 29 const: 2 30 31 '#address-cells': 32 const: 0 33 34 interrupt-controller: true 35 36 reg: 37 maxItems: 1 38 39 interrupts: 40 minItems: 58 41 items: 42 - description: NMI interrupt 43 - description: PORT_IRQ0 interrupt 44 - description: PORT_IRQ1 interrupt 45 - description: PORT_IRQ2 interrupt 46 - description: PORT_IRQ3 interrupt 47 - description: PORT_IRQ4 interrupt 48 - description: PORT_IRQ5 interrupt 49 - description: PORT_IRQ6 interrupt 50 - description: PORT_IRQ7 interrupt 51 - description: PORT_IRQ8 interrupt 52 - description: PORT_IRQ9 interrupt 53 - description: PORT_IRQ10 interrupt 54 - description: PORT_IRQ11 interrupt 55 - description: PORT_IRQ12 interrupt 56 - description: PORT_IRQ13 interrupt 57 - description: PORT_IRQ14 interrupt 58 - description: PORT_IRQ15 interrupt 59 - description: GPIO interrupt, TINT0 60 - description: GPIO interrupt, TINT1 61 - description: GPIO interrupt, TINT2 62 - description: GPIO interrupt, TINT3 63 - description: GPIO interrupt, TINT4 64 - description: GPIO interrupt, TINT5 65 - description: GPIO interrupt, TINT6 66 - description: GPIO interrupt, TINT7 67 - description: GPIO interrupt, TINT8 68 - description: GPIO interrupt, TINT9 69 - description: GPIO interrupt, TINT10 70 - description: GPIO interrupt, TINT11 71 - description: GPIO interrupt, TINT12 72 - description: GPIO interrupt, TINT13 73 - description: GPIO interrupt, TINT14 74 - description: GPIO interrupt, TINT15 75 - description: GPIO interrupt, TINT16 76 - description: GPIO interrupt, TINT17 77 - description: GPIO interrupt, TINT18 78 - description: GPIO interrupt, TINT19 79 - description: GPIO interrupt, TINT20 80 - description: GPIO interrupt, TINT21 81 - description: GPIO interrupt, TINT22 82 - description: GPIO interrupt, TINT23 83 - description: GPIO interrupt, TINT24 84 - description: GPIO interrupt, TINT25 85 - description: GPIO interrupt, TINT26 86 - description: GPIO interrupt, TINT27 87 - description: GPIO interrupt, TINT28 88 - description: GPIO interrupt, TINT29 89 - description: GPIO interrupt, TINT30 90 - description: GPIO interrupt, TINT31 91 - description: Software interrupt, INTA55_0 92 - description: Software interrupt, INTA55_1 93 - description: Software interrupt, INTA55_2 94 - description: Software interrupt, INTA55_3 95 - description: Error interrupt to CA55 96 - description: GTCCRA compare match/input capture (U0) 97 - description: GTCCRB compare match/input capture (U0) 98 - description: GTCCRA compare match/input capture (U1) 99 - description: GTCCRB compare match/input capture (U1) 100 101 interrupt-names: 102 minItems: 58 103 items: 104 - const: nmi 105 - const: port_irq0 106 - const: port_irq1 107 - const: port_irq2 108 - const: port_irq3 109 - const: port_irq4 110 - const: port_irq5 111 - const: port_irq6 112 - const: port_irq7 113 - const: port_irq8 114 - const: port_irq9 115 - const: port_irq10 116 - const: port_irq11 117 - const: port_irq12 118 - const: port_irq13 119 - const: port_irq14 120 - const: port_irq15 121 - const: tint0 122 - const: tint1 123 - const: tint2 124 - const: tint3 125 - const: tint4 126 - const: tint5 127 - const: tint6 128 - const: tint7 129 - const: tint8 130 - const: tint9 131 - const: tint10 132 - const: tint11 133 - const: tint12 134 - const: tint13 135 - const: tint14 136 - const: tint15 137 - const: tint16 138 - const: tint17 139 - const: tint18 140 - const: tint19 141 - const: tint20 142 - const: tint21 143 - const: tint22 144 - const: tint23 145 - const: tint24 146 - const: tint25 147 - const: tint26 148 - const: tint27 149 - const: tint28 150 - const: tint29 151 - const: tint30 152 - const: tint31 153 - const: int-ca55-0 154 - const: int-ca55-1 155 - const: int-ca55-2 156 - const: int-ca55-3 157 - const: icu-error-ca55 158 - const: gpt-u0-gtciada 159 - const: gpt-u0-gtciadb 160 - const: gpt-u1-gtciada 161 - const: gpt-u1-gtciadb 162 163 clocks: 164 maxItems: 1 165 166 power-domains: 167 maxItems: 1 168 169 resets: 170 maxItems: 1 171 172required: 173 - compatible 174 - reg 175 - '#interrupt-cells' 176 - '#address-cells' 177 - interrupt-controller 178 - interrupts 179 - interrupt-names 180 - clocks 181 - power-domains 182 - resets 183 184unevaluatedProperties: false 185 186examples: 187 - | 188 #include <dt-bindings/interrupt-controller/arm-gic.h> 189 #include <dt-bindings/clock/renesas-cpg-mssr.h> 190 191 icu: interrupt-controller@10400000 { 192 compatible = "renesas,r9a09g057-icu"; 193 reg = <0x10400000 0x10000>; 194 #interrupt-cells = <2>; 195 #address-cells = <0>; 196 interrupt-controller; 197 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 198 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 199 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 200 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 201 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 202 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, 203 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 204 <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, 205 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 206 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 207 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 208 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, 209 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 210 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 211 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 212 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, 213 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 214 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 215 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 216 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 217 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 218 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 219 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 220 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 221 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 222 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 223 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 224 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 225 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 226 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 227 <GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>, 228 <GIC_SPI 433 IRQ_TYPE_LEVEL_HIGH>, 229 <GIC_SPI 434 IRQ_TYPE_LEVEL_HIGH>, 230 <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>, 231 <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>, 232 <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>, 233 <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>, 234 <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, 235 <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>, 236 <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>, 237 <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>, 239 <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>, 240 <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>, 241 <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>, 242 <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>, 243 <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>, 244 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>, 245 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>, 246 <GIC_SPI 262 IRQ_TYPE_EDGE_RISING>, 247 <GIC_SPI 263 IRQ_TYPE_EDGE_RISING>, 248 <GIC_SPI 264 IRQ_TYPE_EDGE_RISING>, 249 <GIC_SPI 265 IRQ_TYPE_EDGE_RISING>, 250 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>, 251 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, 252 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>, 253 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>, 254 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>; 255 interrupt-names = "nmi", 256 "port_irq0", "port_irq1", "port_irq2", 257 "port_irq3", "port_irq4", "port_irq5", 258 "port_irq6", "port_irq7", "port_irq8", 259 "port_irq9", "port_irq10", "port_irq11", 260 "port_irq12", "port_irq13", "port_irq14", 261 "port_irq15", 262 "tint0", "tint1", "tint2", "tint3", 263 "tint4", "tint5", "tint6", "tint7", 264 "tint8", "tint9", "tint10", "tint11", 265 "tint12", "tint13", "tint14", "tint15", 266 "tint16", "tint17", "tint18", "tint19", 267 "tint20", "tint21", "tint22", "tint23", 268 "tint24", "tint25", "tint26", "tint27", 269 "tint28", "tint29", "tint30", "tint31", 270 "int-ca55-0", "int-ca55-1", 271 "int-ca55-2", "int-ca55-3", 272 "icu-error-ca55", 273 "gpt-u0-gtciada", "gpt-u0-gtciadb", 274 "gpt-u1-gtciada", "gpt-u1-gtciadb"; 275 clocks = <&cpg CPG_MOD 0x5>; 276 power-domains = <&cpg>; 277 resets = <&cpg 0x36>; 278 }; 279