1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: R-Mobile/R-Car/RZ/G interrupt controller 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - renesas,irqc-r8a73a4 # R-Mobile APE6 17 - renesas,irqc-r8a7742 # RZ/G1H 18 - renesas,irqc-r8a7743 # RZ/G1M 19 - renesas,irqc-r8a7744 # RZ/G1N 20 - renesas,irqc-r8a7745 # RZ/G1E 21 - renesas,irqc-r8a77470 # RZ/G1C 22 - renesas,irqc-r8a7790 # R-Car H2 23 - renesas,irqc-r8a7791 # R-Car M2-W 24 - renesas,irqc-r8a7792 # R-Car V2H 25 - renesas,irqc-r8a7793 # R-Car M2-N 26 - renesas,irqc-r8a7794 # R-Car E2 27 - renesas,intc-ex-r8a774a1 # RZ/G2M 28 - renesas,intc-ex-r8a774b1 # RZ/G2N 29 - renesas,intc-ex-r8a774c0 # RZ/G2E 30 - renesas,intc-ex-r8a774e1 # RZ/G2H 31 - renesas,intc-ex-r8a7795 # R-Car H3 32 - renesas,intc-ex-r8a7796 # R-Car M3-W 33 - renesas,intc-ex-r8a77961 # R-Car M3-W+ 34 - renesas,intc-ex-r8a77965 # R-Car M3-N 35 - renesas,intc-ex-r8a77970 # R-Car V3M 36 - renesas,intc-ex-r8a77980 # R-Car V3H 37 - renesas,intc-ex-r8a77990 # R-Car E3 38 - renesas,intc-ex-r8a77995 # R-Car D3 39 - renesas,intc-ex-r8a779a0 # R-Car V3U 40 - renesas,intc-ex-r8a779f0 # R-Car S4-8 41 - renesas,intc-ex-r8a779g0 # R-Car V4H 42 - renesas,intc-ex-r8a779h0 # R-Car V4M 43 - const: renesas,irqc 44 45 '#interrupt-cells': 46 # an interrupt index and flags, as defined in interrupts.txt in 47 # this directory 48 const: 2 49 50 interrupt-controller: true 51 52 reg: 53 maxItems: 1 54 55 interrupts: 56 minItems: 1 57 maxItems: 32 58 59 clocks: 60 maxItems: 1 61 62 power-domains: 63 maxItems: 1 64 65 resets: 66 maxItems: 1 67 68required: 69 - compatible 70 - '#interrupt-cells' 71 - interrupt-controller 72 - reg 73 - interrupts 74 - clocks 75 76additionalProperties: false 77 78examples: 79 - | 80 #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 81 #include <dt-bindings/interrupt-controller/arm-gic.h> 82 #include <dt-bindings/interrupt-controller/irq.h> 83 84 irqc0: interrupt-controller@e61c0000 { 85 compatible = "renesas,irqc-r8a7790", "renesas,irqc"; 86 #interrupt-cells = <2>; 87 interrupt-controller; 88 reg = <0xe61c0000 0x200>; 89 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 90 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 91 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 92 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 93 clocks = <&cpg CPG_MOD 407>; 94 }; 95