xref: /linux/Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml (revision 162e3480246ef69386d4647d2320d86741bf08a2) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: R-Mobile/R-Car/RZ/G interrupt controller
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - renesas,irqc-r8a73a4        # R-Mobile APE6
17          - renesas,irqc-r8a7742        # RZ/G1H
18          - renesas,irqc-r8a7743        # RZ/G1M
19          - renesas,irqc-r8a7744        # RZ/G1N
20          - renesas,irqc-r8a7745        # RZ/G1E
21          - renesas,irqc-r8a77470       # RZ/G1C
22          - renesas,irqc-r8a7790        # R-Car H2
23          - renesas,irqc-r8a7791        # R-Car M2-W
24          - renesas,irqc-r8a7792        # R-Car V2H
25          - renesas,irqc-r8a7793        # R-Car M2-N
26          - renesas,irqc-r8a7794        # R-Car E2
27          - renesas,intc-ex-r8a774a1    # RZ/G2M
28          - renesas,intc-ex-r8a774b1    # RZ/G2N
29          - renesas,intc-ex-r8a774c0    # RZ/G2E
30          - renesas,intc-ex-r8a774e1    # RZ/G2H
31          - renesas,intc-ex-r8a7795     # R-Car H3
32          - renesas,intc-ex-r8a7796     # R-Car M3-W
33          - renesas,intc-ex-r8a77961    # R-Car M3-W+
34          - renesas,intc-ex-r8a77965    # R-Car M3-N
35          - renesas,intc-ex-r8a77970    # R-Car V3M
36          - renesas,intc-ex-r8a77980    # R-Car V3H
37          - renesas,intc-ex-r8a77990    # R-Car E3
38          - renesas,intc-ex-r8a77995    # R-Car D3
39          - renesas,intc-ex-r8a779a0    # R-Car V3U
40          - renesas,intc-ex-r8a779f0    # R-Car S4-8
41          - renesas,intc-ex-r8a779g0    # R-Car V4H
42      - const: renesas,irqc
43
44  '#interrupt-cells':
45    # an interrupt index and flags, as defined in interrupts.txt in
46    # this directory
47    const: 2
48
49  interrupt-controller: true
50
51  reg:
52    maxItems: 1
53
54  interrupts:
55    minItems: 1
56    maxItems: 32
57
58  clocks:
59    maxItems: 1
60
61  power-domains:
62    maxItems: 1
63
64  resets:
65    maxItems: 1
66
67required:
68  - compatible
69  - '#interrupt-cells'
70  - interrupt-controller
71  - reg
72  - interrupts
73  - clocks
74
75additionalProperties: false
76
77examples:
78  - |
79    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
80    #include <dt-bindings/interrupt-controller/arm-gic.h>
81    #include <dt-bindings/interrupt-controller/irq.h>
82
83    irqc0: interrupt-controller@e61c0000 {
84        compatible = "renesas,irqc-r8a7790", "renesas,irqc";
85        #interrupt-cells = <2>;
86        interrupt-controller;
87        reg = <0xe61c0000 0x200>;
88        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
89                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
90                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
91                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
92        clocks = <&cpg CPG_MOD 407>;
93    };
94