14a2b92a5SBert Vermeulen# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 24a2b92a5SBert Vermeulen%YAML 1.2 34a2b92a5SBert Vermeulen--- 44a2b92a5SBert Vermeulen$id: http://devicetree.org/schemas/interrupt-controller/realtek,rtl-intc.yaml# 54a2b92a5SBert Vermeulen$schema: http://devicetree.org/meta-schemas/core.yaml# 64a2b92a5SBert Vermeulen 7*a612130cSKrzysztof Kozlowskititle: Realtek RTL SoC interrupt controller 84a2b92a5SBert Vermeulen 9a3e77b70SSander Vanheuledescription: 10a3e77b70SSander Vanheule Interrupt controller and router for Realtek MIPS SoCs, allowing each SoC 11a3e77b70SSander Vanheule interrupt to be routed to one parent CPU (hardware) interrupt, or left 12a3e77b70SSander Vanheule disconnected. 13a3e77b70SSander Vanheule All connected input lines from SoC peripherals can be masked individually, 14a3e77b70SSander Vanheule and an interrupt status register is present to indicate which interrupts are 15a3e77b70SSander Vanheule pending. 16a3e77b70SSander Vanheule 174a2b92a5SBert Vermeulenmaintainers: 184a2b92a5SBert Vermeulen - Birger Koblitz <mail@birger-koblitz.de> 194a2b92a5SBert Vermeulen - Bert Vermeulen <bert@biot.com> 204a2b92a5SBert Vermeulen - John Crispin <john@phrozen.org> 214a2b92a5SBert Vermeulen 224a2b92a5SBert Vermeulenproperties: 234a2b92a5SBert Vermeulen compatible: 24a3e77b70SSander Vanheule oneOf: 25a3e77b70SSander Vanheule - items: 26a3e77b70SSander Vanheule - enum: 27a3e77b70SSander Vanheule - realtek,rtl8380-intc 28a3e77b70SSander Vanheule - const: realtek,rtl-intc 29a3e77b70SSander Vanheule - const: realtek,rtl-intc 30a3e77b70SSander Vanheule deprecated: true 314a2b92a5SBert Vermeulen 324a2b92a5SBert Vermeulen "#interrupt-cells": 33a3e77b70SSander Vanheule description: 34a3e77b70SSander Vanheule SoC interrupt line index. 354a2b92a5SBert Vermeulen const: 1 364a2b92a5SBert Vermeulen 374a2b92a5SBert Vermeulen reg: 384a2b92a5SBert Vermeulen maxItems: 1 394a2b92a5SBert Vermeulen 404a2b92a5SBert Vermeulen interrupts: 41a3e77b70SSander Vanheule minItems: 1 42a3e77b70SSander Vanheule maxItems: 15 43a3e77b70SSander Vanheule description: 44a3e77b70SSander Vanheule List of parent interrupts, in the order that they are connected to this 45a3e77b70SSander Vanheule interrupt router's outputs, starting at the first output. 464a2b92a5SBert Vermeulen 474a2b92a5SBert Vermeulen interrupt-controller: true 484a2b92a5SBert Vermeulen 494a2b92a5SBert Vermeulen interrupt-map: 50a3e77b70SSander Vanheule deprecated: true 514a2b92a5SBert Vermeulen description: Describes mapping from SoC interrupts to CPU interrupts 524a2b92a5SBert Vermeulen 534a2b92a5SBert Vermeulenrequired: 544a2b92a5SBert Vermeulen - compatible 554a2b92a5SBert Vermeulen - reg 564a2b92a5SBert Vermeulen - "#interrupt-cells" 574a2b92a5SBert Vermeulen - interrupt-controller 58a3e77b70SSander Vanheule 59a3e77b70SSander VanheuleallOf: 60a3e77b70SSander Vanheule - if: 61a3e77b70SSander Vanheule properties: 62a3e77b70SSander Vanheule compatible: 63a3e77b70SSander Vanheule const: realtek,rtl-intc 64a3e77b70SSander Vanheule then: 65a3e77b70SSander Vanheule properties: 66a3e77b70SSander Vanheule "#address-cells": 67a3e77b70SSander Vanheule const: 0 68a3e77b70SSander Vanheule required: 694a2b92a5SBert Vermeulen - "#address-cells" 704a2b92a5SBert Vermeulen - interrupt-map 71a3e77b70SSander Vanheule else: 72a3e77b70SSander Vanheule required: 73a3e77b70SSander Vanheule - interrupts 744a2b92a5SBert Vermeulen 754a2b92a5SBert VermeulenadditionalProperties: false 764a2b92a5SBert Vermeulen 774a2b92a5SBert Vermeulenexamples: 784a2b92a5SBert Vermeulen - | 79a3e77b70SSander Vanheule interrupt-controller@3000 { 80a3e77b70SSander Vanheule compatible = "realtek,rtl8380-intc", "realtek,rtl-intc"; 814a2b92a5SBert Vermeulen #interrupt-cells = <1>; 824a2b92a5SBert Vermeulen interrupt-controller; 83a3e77b70SSander Vanheule reg = <0x3000 0x18>; 84a3e77b70SSander Vanheule 85a3e77b70SSander Vanheule interrupt-parent = <&cpuintc>; 86a3e77b70SSander Vanheule interrupts = <2>, <3>, <4>, <5>, <6>; 874a2b92a5SBert Vermeulen }; 88