xref: /linux/Documentation/devicetree/bindings/interrupt-controller/mti,cpu-interrupt-controller.yaml (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/mti,cpu-interrupt-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MIPS CPU Interrupt Controller
8
9description: >
10   On MIPS the mips_cpu_irq_of_init() helper can be used to initialize the 8 CPU
11   IRQs from a devicetree file and create a irq_domain for IRQ controller.
12
13   With the irq_domain in place we can describe how the 8 IRQs are wired to the
14   platforms internal interrupt controller cascade.
15
16maintainers:
17  - Thomas Bogendoerfer <tsbogend@alpha.franken.de>
18
19properties:
20  compatible:
21    const: mti,cpu-interrupt-controller
22
23  '#interrupt-cells':
24    const: 1
25
26  '#address-cells':
27    const: 0
28
29  interrupt-controller: true
30
31additionalProperties: false
32
33required:
34  - compatible
35  - '#interrupt-cells'
36  - '#address-cells'
37  - interrupt-controller
38
39examples:
40  - |
41    interrupt-controller {
42      compatible = "mti,cpu-interrupt-controller";
43      #address-cells = <0>;
44      #interrupt-cells = <1>;
45      interrupt-controller;
46    };
47