xref: /linux/Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml (revision cbecf716ca618fd44feda6bd9a64a8179d031fc5)
1*6d8af863SMark-PK Tsai# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*6d8af863SMark-PK Tsai%YAML 1.2
3*6d8af863SMark-PK Tsai---
4*6d8af863SMark-PK Tsai$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml#
5*6d8af863SMark-PK Tsai$schema: http://devicetree.org/meta-schemas/core.yaml#
6*6d8af863SMark-PK Tsai
7*6d8af863SMark-PK Tsaititle: MStar Interrupt Controller
8*6d8af863SMark-PK Tsai
9*6d8af863SMark-PK Tsaimaintainers:
10*6d8af863SMark-PK Tsai  - Mark-PK Tsai <mark-pk.tsai@mediatek.com>
11*6d8af863SMark-PK Tsai
12*6d8af863SMark-PK Tsaidescription: |+
13*6d8af863SMark-PK Tsai  MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy
14*6d8af863SMark-PK Tsai  interrupt controllers that routes interrupts to the GIC.
15*6d8af863SMark-PK Tsai
16*6d8af863SMark-PK Tsai  The HW block exposes a number of interrupt controllers, each
17*6d8af863SMark-PK Tsai  can support up to 64 interrupts.
18*6d8af863SMark-PK Tsai
19*6d8af863SMark-PK Tsaiproperties:
20*6d8af863SMark-PK Tsai  compatible:
21*6d8af863SMark-PK Tsai    const: mstar,mst-intc
22*6d8af863SMark-PK Tsai
23*6d8af863SMark-PK Tsai  interrupt-controller: true
24*6d8af863SMark-PK Tsai
25*6d8af863SMark-PK Tsai  "#interrupt-cells":
26*6d8af863SMark-PK Tsai    const: 3
27*6d8af863SMark-PK Tsai    description: |
28*6d8af863SMark-PK Tsai      Use the same format as specified by GIC in arm,gic.yaml.
29*6d8af863SMark-PK Tsai
30*6d8af863SMark-PK Tsai  reg:
31*6d8af863SMark-PK Tsai    maxItems: 1
32*6d8af863SMark-PK Tsai
33*6d8af863SMark-PK Tsai  mstar,irqs-map-range:
34*6d8af863SMark-PK Tsai    description: |
35*6d8af863SMark-PK Tsai      The range <start, end> of parent interrupt controller's interrupt
36*6d8af863SMark-PK Tsai      lines that are hardwired to mstar interrupt controller.
37*6d8af863SMark-PK Tsai    $ref: /schemas/types.yaml#/definitions/uint32-matrix
38*6d8af863SMark-PK Tsai    items:
39*6d8af863SMark-PK Tsai      minItems: 2
40*6d8af863SMark-PK Tsai      maxItems: 2
41*6d8af863SMark-PK Tsai
42*6d8af863SMark-PK Tsai  mstar,intc-no-eoi:
43*6d8af863SMark-PK Tsai    description:
44*6d8af863SMark-PK Tsai      Mark this controller has no End Of Interrupt(EOI) implementation.
45*6d8af863SMark-PK Tsai    type: boolean
46*6d8af863SMark-PK Tsai
47*6d8af863SMark-PK Tsairequired:
48*6d8af863SMark-PK Tsai  - compatible
49*6d8af863SMark-PK Tsai  - reg
50*6d8af863SMark-PK Tsai  - mstar,irqs-map-range
51*6d8af863SMark-PK Tsai
52*6d8af863SMark-PK TsaiadditionalProperties: false
53*6d8af863SMark-PK Tsai
54*6d8af863SMark-PK Tsaiexamples:
55*6d8af863SMark-PK Tsai  - |
56*6d8af863SMark-PK Tsai    mst_intc0: interrupt-controller@1f2032d0 {
57*6d8af863SMark-PK Tsai      compatible = "mstar,mst-intc";
58*6d8af863SMark-PK Tsai      interrupt-controller;
59*6d8af863SMark-PK Tsai      #interrupt-cells = <3>;
60*6d8af863SMark-PK Tsai      interrupt-parent = <&gic>;
61*6d8af863SMark-PK Tsai      reg = <0x1f2032d0 0x30>;
62*6d8af863SMark-PK Tsai      mstar,irqs-map-range = <0 63>;
63*6d8af863SMark-PK Tsai    };
64*6d8af863SMark-PK Tsai...
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