xref: /linux/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1c1cd67d2SLubomir Rintel# SPDX-License-Identifier: GPL-2.0-only
2c1cd67d2SLubomir Rintel%YAML 1.2
3c1cd67d2SLubomir Rintel---
4c1cd67d2SLubomir Rintel$id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
5c1cd67d2SLubomir Rintel$schema: http://devicetree.org/meta-schemas/core.yaml#
6c1cd67d2SLubomir Rintel
784e85359SKrzysztof Kozlowskititle: Marvell MMP/Orion Interrupt controller
8c1cd67d2SLubomir Rintel
9c1cd67d2SLubomir Rintelmaintainers:
10866f404fSKrzysztof Kozlowski  - Andrew Lunn <andrew@lunn.ch>
11866f404fSKrzysztof Kozlowski  - Gregory Clement <gregory.clement@bootlin.com>
12c1cd67d2SLubomir Rintel
13c1cd67d2SLubomir RintelallOf:
14c1cd67d2SLubomir Rintel  - if:
15c1cd67d2SLubomir Rintel      properties:
16c1cd67d2SLubomir Rintel        compatible:
17c1cd67d2SLubomir Rintel          not:
18c1cd67d2SLubomir Rintel            contains:
19c1cd67d2SLubomir Rintel              const: marvell,orion-intc
20c1cd67d2SLubomir Rintel    then:
21c1cd67d2SLubomir Rintel      required:
22c1cd67d2SLubomir Rintel        - mrvl,intc-nr-irqs
23c1cd67d2SLubomir Rintel  - if:
24c1cd67d2SLubomir Rintel      properties:
25c1cd67d2SLubomir Rintel        compatible:
26c1cd67d2SLubomir Rintel          contains:
27c1cd67d2SLubomir Rintel            enum:
28c1cd67d2SLubomir Rintel              - mrvl,mmp-intc
29c1cd67d2SLubomir Rintel              - mrvl,mmp2-intc
30c1cd67d2SLubomir Rintel    then:
31c1cd67d2SLubomir Rintel      properties:
32c1cd67d2SLubomir Rintel        reg:
33c1cd67d2SLubomir Rintel          maxItems: 1
34c1cd67d2SLubomir Rintel  - if:
35c1cd67d2SLubomir Rintel      properties:
36c1cd67d2SLubomir Rintel        compatible:
37c1cd67d2SLubomir Rintel          contains:
38c1cd67d2SLubomir Rintel            enum:
39c1cd67d2SLubomir Rintel              - marvell,mmp3-intc
40c1cd67d2SLubomir Rintel              - mrvl,mmp2-mux-intc
41c1cd67d2SLubomir Rintel    then:
42c1cd67d2SLubomir Rintel      properties:
43c1cd67d2SLubomir Rintel        reg:
44c1cd67d2SLubomir Rintel          minItems: 2
45c1cd67d2SLubomir Rintel  - if:
46c1cd67d2SLubomir Rintel      properties:
47c1cd67d2SLubomir Rintel        compatible:
48c1cd67d2SLubomir Rintel          contains:
49c1cd67d2SLubomir Rintel            const: mrvl,mmp2-mux-intc
50c1cd67d2SLubomir Rintel    then:
51c1cd67d2SLubomir Rintel      properties:
52c1cd67d2SLubomir Rintel        interrupts:
53c1cd67d2SLubomir Rintel          maxItems: 1
54c1cd67d2SLubomir Rintel        reg-names:
55c1cd67d2SLubomir Rintel          items:
56*43d78445SRob Herring            - const: mux status
57*43d78445SRob Herring            - const: mux mask
58c1cd67d2SLubomir Rintel      required:
59c1cd67d2SLubomir Rintel        - interrupts
60c1cd67d2SLubomir Rintel    else:
61c1cd67d2SLubomir Rintel      properties:
62c1cd67d2SLubomir Rintel        interrupts: false
63c1cd67d2SLubomir Rintel
64c1cd67d2SLubomir Rintelproperties:
65c1cd67d2SLubomir Rintel  '#interrupt-cells':
66c1cd67d2SLubomir Rintel    const: 1
67c1cd67d2SLubomir Rintel
68c1cd67d2SLubomir Rintel  compatible:
69c1cd67d2SLubomir Rintel    enum:
70c1cd67d2SLubomir Rintel      - mrvl,mmp-intc
71c1cd67d2SLubomir Rintel      - mrvl,mmp2-intc
72c1cd67d2SLubomir Rintel      - marvell,mmp3-intc
73c1cd67d2SLubomir Rintel      - marvell,orion-intc
74c1cd67d2SLubomir Rintel      - mrvl,mmp2-mux-intc
75c1cd67d2SLubomir Rintel
76c1cd67d2SLubomir Rintel  reg:
77c1cd67d2SLubomir Rintel    minItems: 1
78c1cd67d2SLubomir Rintel    maxItems: 2
79c1cd67d2SLubomir Rintel
80c1cd67d2SLubomir Rintel  reg-names: true
81c1cd67d2SLubomir Rintel
82c1cd67d2SLubomir Rintel  interrupts: true
83c1cd67d2SLubomir Rintel
84c1cd67d2SLubomir Rintel  interrupt-controller: true
85c1cd67d2SLubomir Rintel
86c1cd67d2SLubomir Rintel  mrvl,intc-nr-irqs:
87c1cd67d2SLubomir Rintel    description: |
88c1cd67d2SLubomir Rintel      Specifies the number of interrupts in the interrupt controller.
89c1cd67d2SLubomir Rintel    $ref: /schemas/types.yaml#/definitions/uint32
90c1cd67d2SLubomir Rintel
91c1cd67d2SLubomir Rintel  mrvl,clr-mfp-irq:
92c1cd67d2SLubomir Rintel    description: |
93c1cd67d2SLubomir Rintel      Specifies the interrupt that needs to clear MFP edge detection first.
94c1cd67d2SLubomir Rintel    $ref: /schemas/types.yaml#/definitions/uint32
95c1cd67d2SLubomir Rintel
96c1cd67d2SLubomir Rintelrequired:
97c1cd67d2SLubomir Rintel  - '#interrupt-cells'
98c1cd67d2SLubomir Rintel  - compatible
99c1cd67d2SLubomir Rintel  - reg
100c1cd67d2SLubomir Rintel  - interrupt-controller
101c1cd67d2SLubomir Rintel
102c1cd67d2SLubomir RinteladditionalProperties: false
103c1cd67d2SLubomir Rintel
104c1cd67d2SLubomir Rintelexamples:
105c1cd67d2SLubomir Rintel  - |
106c1cd67d2SLubomir Rintel    interrupt-controller@d4282000 {
107c1cd67d2SLubomir Rintel        compatible = "mrvl,mmp2-intc";
108c1cd67d2SLubomir Rintel        interrupt-controller;
109c1cd67d2SLubomir Rintel        #interrupt-cells = <1>;
110c1cd67d2SLubomir Rintel        reg = <0xd4282000 0x1000>;
111c1cd67d2SLubomir Rintel        mrvl,intc-nr-irqs = <64>;
112c1cd67d2SLubomir Rintel    };
113c1cd67d2SLubomir Rintel
114c1cd67d2SLubomir Rintel    interrupt-controller@d4282150 {
115c1cd67d2SLubomir Rintel        compatible = "mrvl,mmp2-mux-intc";
116c1cd67d2SLubomir Rintel        interrupts = <4>;
117c1cd67d2SLubomir Rintel        interrupt-controller;
118c1cd67d2SLubomir Rintel        #interrupt-cells = <1>;
119c1cd67d2SLubomir Rintel        reg = <0x150 0x4>, <0x168 0x4>;
120c1cd67d2SLubomir Rintel        reg-names = "mux status", "mux mask";
121c1cd67d2SLubomir Rintel        mrvl,intc-nr-irqs = <2>;
122c1cd67d2SLubomir Rintel    };
123c1cd67d2SLubomir Rintel  - |
124c1cd67d2SLubomir Rintel    interrupt-controller@fed20204 {
125c1cd67d2SLubomir Rintel        compatible = "marvell,orion-intc";
126c1cd67d2SLubomir Rintel        interrupt-controller;
127c1cd67d2SLubomir Rintel        #interrupt-cells = <1>;
128c1cd67d2SLubomir Rintel        reg = <0xfed20204 0x04>,
129c1cd67d2SLubomir Rintel              <0xfed20214 0x04>;
130c1cd67d2SLubomir Rintel    };
131c1cd67d2SLubomir Rintel
132c1cd67d2SLubomir Rintel...
133