xref: /linux/Documentation/devicetree/bindings/interrupt-controller/microchip,pic32-evic.txt (revision 9938b04472d5c59f8bd8152a548533a8599596a2)
1*edf2194dSCristian BirsanMicrochip PIC32 Interrupt Controller
2*edf2194dSCristian Birsan====================================
3*edf2194dSCristian Birsan
4*edf2194dSCristian BirsanThe Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
5*edf2194dSCristian BirsanIt handles all internal and external interrupts. This controller exists outside
6*edf2194dSCristian Birsanof the CPU and is the arbitrator of all interrupts (including interrupts from
7*edf2194dSCristian Birsanthe CPU itself) before they are presented to the CPU.
8*edf2194dSCristian Birsan
9*edf2194dSCristian BirsanExternal interrupts have a software configurable edge polarity. Non external
10*edf2194dSCristian Birsaninterrupts have a type and polarity that is determined by the source of the
11*edf2194dSCristian Birsaninterrupt.
12*edf2194dSCristian Birsan
13*edf2194dSCristian BirsanRequired properties
14*edf2194dSCristian Birsan-------------------
15*edf2194dSCristian Birsan
16*edf2194dSCristian Birsan- compatible: Should be "microchip,pic32mzda-evic"
17*edf2194dSCristian Birsan- reg: Specifies physical base address and size of register range.
18*edf2194dSCristian Birsan- interrupt-controller: Identifies the node as an interrupt controller.
19*edf2194dSCristian Birsan- #interrupt cells: Specifies the number of cells used to encode an interrupt
20*edf2194dSCristian Birsan  source connected to this controller. The value shall be 2 and interrupt
21*edf2194dSCristian Birsan  descriptor shall have the following format:
22*edf2194dSCristian Birsan
23*edf2194dSCristian Birsan	<hw_irq irq_type>
24*edf2194dSCristian Birsan
25*edf2194dSCristian Birsan  hw_irq - represents the hardware interrupt number as in the data sheet.
26*edf2194dSCristian Birsan  irq_type - is used to describe the type and polarity of an interrupt. For
27*edf2194dSCristian Birsan  internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
28*edf2194dSCristian Birsan  IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
29*edf2194dSCristian Birsan  IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
30*edf2194dSCristian Birsan
31*edf2194dSCristian BirsanOptional properties
32*edf2194dSCristian Birsan-------------------
33*edf2194dSCristian Birsan- microchip,external-irqs: u32 array of external interrupts with software
34*edf2194dSCristian Birsan  polarity configuration. This array corresponds to the bits in the INTCON
35*edf2194dSCristian Birsan  SFR.
36*edf2194dSCristian Birsan
37*edf2194dSCristian BirsanExample
38*edf2194dSCristian Birsan-------
39*edf2194dSCristian Birsan
40*edf2194dSCristian Birsanevic: interrupt-controller@1f810000 {
41*edf2194dSCristian Birsan	compatible = "microchip,pic32mzda-evic";
42*edf2194dSCristian Birsan	interrupt-controller;
43*edf2194dSCristian Birsan	#interrupt-cells = <2>;
44*edf2194dSCristian Birsan	reg = <0x1f810000 0x1000>;
45*edf2194dSCristian Birsan	microchip,external-irqs = <3 8 13 18 23>;
46*edf2194dSCristian Birsan};
47*edf2194dSCristian Birsan
48*edf2194dSCristian BirsanEach device/peripheral must request its interrupt line with the associated type
49*edf2194dSCristian Birsanand polarity.
50*edf2194dSCristian Birsan
51*edf2194dSCristian BirsanInternal interrupt DTS snippet
52*edf2194dSCristian Birsan------------------------------
53*edf2194dSCristian Birsan
54*edf2194dSCristian Birsandevice@1f800000 {
55*edf2194dSCristian Birsan	...
56*edf2194dSCristian Birsan	interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
57*edf2194dSCristian Birsan	...
58*edf2194dSCristian Birsan};
59*edf2194dSCristian Birsan
60*edf2194dSCristian BirsanExternal interrupt DTS snippet
61*edf2194dSCristian Birsan------------------------------
62*edf2194dSCristian Birsan
63*edf2194dSCristian Birsandevice@1f800000 {
64*edf2194dSCristian Birsan	...
65*edf2194dSCristian Birsan	interrupts = <3 IRQ_TYPE_EDGE_RISING>;
66*edf2194dSCristian Birsan	...
67*edf2194dSCristian Birsan};
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