xref: /linux/Documentation/devicetree/bindings/interrupt-controller/microchip,lan966x-oic.yaml (revision adc4fb9c814b5d5cc6021022900fd5eb0b3c8165)
117972a5fSHerve Codina# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
217972a5fSHerve Codina%YAML 1.2
317972a5fSHerve Codina---
417972a5fSHerve Codina$id: http://devicetree.org/schemas/interrupt-controller/microchip,lan966x-oic.yaml#
517972a5fSHerve Codina$schema: http://devicetree.org/meta-schemas/core.yaml#
617972a5fSHerve Codina
717972a5fSHerve Codinatitle: Microchip LAN966x outband interrupt controller
817972a5fSHerve Codina
917972a5fSHerve Codinamaintainers:
1017972a5fSHerve Codina  - Herve Codina <herve.codina@bootlin.com>
1117972a5fSHerve Codina
1217972a5fSHerve CodinaallOf:
1317972a5fSHerve Codina  - $ref: /schemas/interrupt-controller.yaml#
1417972a5fSHerve Codina
1517972a5fSHerve Codinadescription: |
1617972a5fSHerve Codina  The Microchip LAN966x outband interrupt controller (OIC) maps the internal
17*3fafa6a0SGeert Uytterhoeven  interrupt sources of the LAN966x device to a PCI interrupt when the LAN966x
18*3fafa6a0SGeert Uytterhoeven  device is used as a PCI device.
1917972a5fSHerve Codina
2017972a5fSHerve Codinaproperties:
2117972a5fSHerve Codina  compatible:
2217972a5fSHerve Codina    const: microchip,lan966x-oic
2317972a5fSHerve Codina
2417972a5fSHerve Codina  '#interrupt-cells':
2517972a5fSHerve Codina    const: 2
2617972a5fSHerve Codina
2717972a5fSHerve Codina  interrupt-controller: true
2817972a5fSHerve Codina
2917972a5fSHerve Codina  reg:
3017972a5fSHerve Codina    maxItems: 1
3117972a5fSHerve Codina
3217972a5fSHerve Codina  interrupts:
3317972a5fSHerve Codina    maxItems: 1
3417972a5fSHerve Codina
3517972a5fSHerve Codinarequired:
3617972a5fSHerve Codina  - compatible
3717972a5fSHerve Codina  - '#interrupt-cells'
3817972a5fSHerve Codina  - interrupt-controller
3917972a5fSHerve Codina  - interrupts
4017972a5fSHerve Codina  - reg
4117972a5fSHerve Codina
4217972a5fSHerve CodinaadditionalProperties: false
4317972a5fSHerve Codina
4417972a5fSHerve Codinaexamples:
4517972a5fSHerve Codina  - |
4617972a5fSHerve Codina    interrupt-controller@e00c0120 {
4717972a5fSHerve Codina        compatible = "microchip,lan966x-oic";
4817972a5fSHerve Codina        reg = <0xe00c0120 0x190>;
4917972a5fSHerve Codina        #interrupt-cells = <2>;
5017972a5fSHerve Codina        interrupt-controller;
5117972a5fSHerve Codina        interrupts = <0>;
5217972a5fSHerve Codina        interrupt-parent = <&intc>;
5317972a5fSHerve Codina    };
5417972a5fSHerve Codina...
55