xref: /linux/Documentation/devicetree/bindings/interrupt-controller/marvell,odmi-controller.yaml (revision bf373e4c786bfe989e637195252698f45b157a68)
1*bbb1999aSRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*bbb1999aSRob Herring (Arm)%YAML 1.2
3*bbb1999aSRob Herring (Arm)---
4*bbb1999aSRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml#
5*bbb1999aSRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml#
6*bbb1999aSRob Herring (Arm)
7*bbb1999aSRob Herring (Arm)title: Marvell ODMI controller
8*bbb1999aSRob Herring (Arm)
9*bbb1999aSRob Herring (Arm)maintainers:
10*bbb1999aSRob Herring (Arm)  - Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11*bbb1999aSRob Herring (Arm)
12*bbb1999aSRob Herring (Arm)description:
13*bbb1999aSRob Herring (Arm)  Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can
14*bbb1999aSRob Herring (Arm)  be used by on-board peripherals for MSI interrupts.
15*bbb1999aSRob Herring (Arm)
16*bbb1999aSRob Herring (Arm)properties:
17*bbb1999aSRob Herring (Arm)  compatible:
18*bbb1999aSRob Herring (Arm)    const: marvell,odmi-controller
19*bbb1999aSRob Herring (Arm)
20*bbb1999aSRob Herring (Arm)  reg:
21*bbb1999aSRob Herring (Arm)    description: List of register definitions, one for each ODMI frame.
22*bbb1999aSRob Herring (Arm)
23*bbb1999aSRob Herring (Arm)  msi-controller: true
24*bbb1999aSRob Herring (Arm)
25*bbb1999aSRob Herring (Arm)  marvell,odmi-frames:
26*bbb1999aSRob Herring (Arm)    description: Number of ODMI frames available. Each frame provides a number of events.
27*bbb1999aSRob Herring (Arm)    $ref: /schemas/types.yaml#/definitions/uint32
28*bbb1999aSRob Herring (Arm)
29*bbb1999aSRob Herring (Arm)  marvell,spi-base:
30*bbb1999aSRob Herring (Arm)    description: >
31*bbb1999aSRob Herring (Arm)      List of GIC base SPI interrupts, one for each ODMI frame. Those SPI
32*bbb1999aSRob Herring (Arm)      interrupts are 0-based, i.e. marvell,spi-base = <128> will use SPI #96.
33*bbb1999aSRob Herring (Arm)      See Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
34*bbb1999aSRob Herring (Arm)      for details.
35*bbb1999aSRob Herring (Arm)    $ref: /schemas/types.yaml#/definitions/uint32-array
36*bbb1999aSRob Herring (Arm)
37*bbb1999aSRob Herring (Arm)required:
38*bbb1999aSRob Herring (Arm)  - compatible
39*bbb1999aSRob Herring (Arm)  - reg
40*bbb1999aSRob Herring (Arm)  - msi-controller
41*bbb1999aSRob Herring (Arm)  - marvell,odmi-frames
42*bbb1999aSRob Herring (Arm)  - marvell,spi-base
43*bbb1999aSRob Herring (Arm)
44*bbb1999aSRob Herring (Arm)additionalProperties: false
45*bbb1999aSRob Herring (Arm)
46*bbb1999aSRob Herring (Arm)examples:
47*bbb1999aSRob Herring (Arm)  - |
48*bbb1999aSRob Herring (Arm)    msi-controller@300000 {
49*bbb1999aSRob Herring (Arm)        compatible = "marvell,odmi-controller";
50*bbb1999aSRob Herring (Arm)        msi-controller;
51*bbb1999aSRob Herring (Arm)        marvell,odmi-frames = <4>;
52*bbb1999aSRob Herring (Arm)        reg = <0x300000 0x4000>, <0x304000 0x4000>, <0x308000 0x4000>, <0x30C000 0x4000>;
53*bbb1999aSRob Herring (Arm)        marvell,spi-base = <128>, <136>, <144>, <152>;
54*bbb1999aSRob Herring (Arm)    };
55