1*4f879955SRob Herring (Arm)# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*4f879955SRob Herring (Arm)# Copyright 2025 Daniel Tang <dt.tangr@gmail.com> 3*4f879955SRob Herring (Arm)%YAML 1.2 4*4f879955SRob Herring (Arm)--- 5*4f879955SRob Herring (Arm)$id: http://devicetree.org/schemas/interrupt-controller/lsi,zevio-intc.yaml# 6*4f879955SRob Herring (Arm)$schema: http://devicetree.org/meta-schemas/core.yaml# 7*4f879955SRob Herring (Arm) 8*4f879955SRob Herring (Arm)title: TI-NSPIRE Interrupt Controller 9*4f879955SRob Herring (Arm) 10*4f879955SRob Herring (Arm)maintainers: 11*4f879955SRob Herring (Arm) - Daniel Tang <dt.tangr@gmail.com> 12*4f879955SRob Herring (Arm) 13*4f879955SRob Herring (Arm)description: | 14*4f879955SRob Herring (Arm) TI-NSPIRE interrupt controller 15*4f879955SRob Herring (Arm) 16*4f879955SRob Herring (Arm)properties: 17*4f879955SRob Herring (Arm) compatible: 18*4f879955SRob Herring (Arm) const: lsi,zevio-intc 19*4f879955SRob Herring (Arm) 20*4f879955SRob Herring (Arm) reg: 21*4f879955SRob Herring (Arm) maxItems: 1 22*4f879955SRob Herring (Arm) 23*4f879955SRob Herring (Arm) interrupt-controller: true 24*4f879955SRob Herring (Arm) 25*4f879955SRob Herring (Arm) '#interrupt-cells': 26*4f879955SRob Herring (Arm) const: 1 27*4f879955SRob Herring (Arm) 28*4f879955SRob Herring (Arm)required: 29*4f879955SRob Herring (Arm) - compatible 30*4f879955SRob Herring (Arm) - reg 31*4f879955SRob Herring (Arm) - interrupt-controller 32*4f879955SRob Herring (Arm) - '#interrupt-cells' 33*4f879955SRob Herring (Arm) 34*4f879955SRob Herring (Arm)additionalProperties: false 35*4f879955SRob Herring (Arm) 36*4f879955SRob Herring (Arm)examples: 37*4f879955SRob Herring (Arm) - | 38*4f879955SRob Herring (Arm) interrupt-controller@dc000000 { 39*4f879955SRob Herring (Arm) compatible = "lsi,zevio-intc"; 40*4f879955SRob Herring (Arm) interrupt-controller; 41*4f879955SRob Herring (Arm) reg = <0xdc000000 0x1000>; 42*4f879955SRob Herring (Arm) #interrupt-cells = <1>; 43*4f879955SRob Herring (Arm) }; 44